- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄203637 > W9425G8DH-6 (WINBOND ELECTRONICS CORP) 32M X 8 DDR DRAM, 0.7 ns, PDSO66 PDF資料下載
參數(shù)資料
| 型號(hào)： | W9425G8DH-6 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 32M X 8 DDR DRAM, 0.7 ns, PDSO66 |
| 封裝： | 0.400 INCH, 0.65 MM PITCH, ROHS COMPLIANT, TSOP2-66 |
| 文件頁(yè)數(shù)： | 13/53頁(yè) |
| 文件大?。?/td> | 1920K |
| 代理商： | W9425G8DH-6 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)
W9425G8DH
Publication Release Date: Nov. 20, 2007
- 20 -
Revision A4
Function Truth Table, continued
CURRENT
STATE
CS
RAS
CAS
WE
ADDRESS
COMMAND
ACTION
NOTES
H
X
DSL
NOP->Row active after tWR
L
H
X
NOP
NOP->Row active after tWR
L
H
L
X
BST
ILLEGAL
L
H
L
H
BS, CA, A10
READ/READA
ILLEGAL
3
L
H
L
BS, CA, A10
WRIT/WRITA
ILLEGAL
3
L
H
BS, RA
ACT
ILLEGAL
3
L
H
L
BS, A10
PRE/PREA
ILLEGAL
3
L
H
X
AREF/SELF
ILLEGAL
Write
Recovering
L
Op-Code
MRS/EMRS
ILLEGAL
H
X
DSL
NOP->Enter precharge after tWR
L
H
X
NOP
NOP->Enter precharge after tWR
L
H
L
X
BST
ILLEGAL
L
H
L
H
BS, CA, A10
READ/READA
ILLEGAL
3
L
H
L
BS, CA, A10
WRIT/WRITA
ILLEGAL
3
L
H
BS, RA
ACT
ILLEGAL
3
L
H
L
BS, A10
PRE/PREA
ILLEGAL
3
L
H
X
AREF/SELF
ILLEGAL
Write
Recovering
with Auto-
precharge
L
Op-Code
MRS/EMRS
ILLEGAL
H
X
DSL
NOP->Idle after tRC
L
H
X
NOP
NOP->Idle after tRC
L
H
L
X
BST
ILLEGAL
L
H
L
H
X
READ/WRIT
ILLEGAL
L
H
X
ACT/PRE/PREA
ILLEGAL
Refreshing
L
X
AREF/SELF/MRS/EMRS
ILLEGAL
H
X
DSL
NOP->Row after tMRD
L
H
X
NOP
NOP->Row after tMRD
L
H
L
X
BST
ILLEGAL
L
H
L
X
READ/WRIT
ILLEGAL
Mode
Register
Accessing
L
X
ACT/PRE/PREA/ARE
F/SELF/MRS/EMRS
ILLEGAL
Notes
:
1. All entries assume that CKE was active (High level) during the preceding clock cycle and the current clock cycle.
2. Illegal if any bank is not idle.
3. Illegal to bank in specified states; Function may be legal in the bank indicated by Bank Address (BS), depending on the
state of that bank.
4. Illegal if tRCD is not satisfied.
5. Illegal if tRAS is not satisfied.
6. Must satisfy burst interrupt condition.
7. Must avoid bus contention, bus turn around, and/or satisfy write recovery requirements.
8. Must mask preceding data which don’t satisfy tWR.
Remark: H = High level, L = Low level, X = High or Low level (Don’t Care), V = Valid data
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W946432AD-6 | 2M X 32 DDR DRAM, 0.1 ns, PQFP100 |
| W947D6HBHX6E | 8M X 16 DDR DRAM, 5 ns, PBGA60 |
| W9602BB | PUSHBUTTON SWITCH, SPST, MOMENTARY, 10A, 28VDC, PANEL MOUNT-THREADED |
| W9605BB | PUSHBUTTON SWITCH, SPST, MOMENTARY, 10A, 28VDC, PANEL MOUNT-THREADED |
| W9606BB | PUSHBUTTON SWITCH, SPDT, MOMENTARY, 10A, 28VDC, PANEL MOUNT-THREADED |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W9425G8EH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8M × 4 BANKS × 8 BITS DDR SDRAM |
| W946432AD | 制造商:WINBOND 制造商全稱:Winbond 功能描述:512K X 4 BANKS X 32 BITS DDR SDRAM |
| W9464G6IB | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M × 4 BANKS × 16 BITS DDR SDRAM |
| W9464G6IH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M ?? 4 BANKS ?? 16 BITS DDR SDRAM |
| W9464G6JH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M ? 4 BANKS ? 16 BITS DDR SDRAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。