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參數(shù)資料
| 型號： | W9412G6IH-6I |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 8M X 16 DDR DRAM, 0.7 ns, PDSO66 |
| 封裝： | 0.400 INCH, ROHS COMPLIANT, TSOP2-66 |
| 文件頁數(shù)： | 18/53頁 |
| 文件大?。?/td> | 825K |
| 代理商： | W9412G6IH-6I |
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W9412G6IH
Publication Release Date: Sep. 16, 2009
- 25 -
Revision A06
9.5 DC Characteristics
MAX.
SYM.
PARAMETER
-4
-5/-5I
-6/-6I
UNIT
NOTES
IDD0
Operating current: One Bank Active-Precharge;
tRC = tRC min; tCK = tCK min;
DQ, DM and DQS inputs changing once per clock cycle;
Address and control inputs changing once every two clock cycles.
130
120
7
IDD1
Operating current: One Bank Active-Read-Precharge;
Burst = 4; tRC = tRC min; CL = 3; tCK = tCK min; IOUT = 0 mA;
Address and control inputs changing once per clock cycle
.
140
130
7, 9
IDD2P
Precharge Power Down standby current:
All Banks Idle; Power down mode;
CKE < VIL max; tCK = tCK min; Vin = VREF for DQ, DQS and DM
.
20
IDD2N
Idle standby current:
CS > VIH min; All Banks Idle; CKE > VIH min; tCK = tCK min;
Address and other control inputs changing once per clock cycle;
Vin > VIH min or Vin < VIL max for DQ, DQS and DM
.
45
7
IDD3P
Active Power Down standby current:
One Bank Active; Power down mode;
CKE < VIL max; tCK = tCK min;
Vin = VREF for DQ, DQS and DM
.
20
IDD3N
Active standby current:
CS > VIH min; CKE > VIH min; One Bank Active-Precharge;
tRC = tRAS max; tCK = tCK min;
DQ, DM and DQS inputs changing twice per clock cycle;
Address and other control inputs changing once per clock cycle
.
60
7
IDD4R
Operating current:
Burst = 2; Reads; Continuous burst; One Bank Active;
Address and control inputs changing once per clock cycle;
CL=2; tCK = tCK min; IOUT = 0mA.
185
180
170
7, 9
IDD4W
Operating current:
Burst = 2; Write; Continuous burst; One Bank Active;
Address and control inputs changing once per clock cycle;
CL = 2; tCK = tCK min;
DQ, DM and DQS inputs changing twice per clock cycle.
185
180
170
7
IDD5
Auto Refresh current: tRC = tRFC min.
200
190
7
IDD6
Self Refresh current: CKE < 0.2V; external clock on; tCK = tCK min.
3
IDD7
Random Read current: 4 Banks Active Read with activate every
20nS, Auto-Precharge Read every 20 nS;
Burst = 4; tRCD = 3; IOUT = 0mA;
DQ, DM and DQS inputs changing twice per clock cycle;
Address changing once per clock cycle.
320
300
mA
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W9412G6JH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M ? 4 BANKS ? 16 BITS DDR SDRAM |
| W9412G6JH-4 | 制造商:Winbond Electronics Corp 功能描述:8*16B DDR1 制造商:Winbond Electronics Corp 功能描述:IC DDR SDRAM 128M 250MHZ 66TSOP |
| W9412G6JH-5 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 128M-Bit 8Mx16 2.5V 66-Pin TSOP 制造商:Winbond Electronics Corp 功能描述:128M BIT DDR1 |
| W9412G6JH-5I | 功能描述:IC DDR SDRAM 128MBIT 66TSOPII RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:72 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步 存儲容量:4.5M（256K x 18） 速度:133MHz 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x20） 包裝:托盤 |
| W9412G6JH-5TR | 制造商:Winbond Electronics Corp 功能描述:128M DDR SDRAM X16 200MHZ, 65N |
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