參數(shù)資料
型號(hào): W28J161TB90L
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 1M X 16 FLASH 3V PROM, 90 ns, PBGA48
封裝: 8 X 8 MM, 0.75 MM PITCH, TFBGA-48
文件頁數(shù): 23/43頁
文件大小: 1333K
代理商: W28J161TB90L
W28J161B/T
1. GENERAL DESCRIPTION
The W28J161B/T Flash memory chip is a high-density, cost-effective, nonvolatile, read/write storage
device suited for a wide range of applications. It operates off of VDD = 2.7V to 3.6V, with VPP of 2.7V to
3.6V or 11.7V to 12.3V. This low voltage operation capability enbales use in low power applications.
The IC features a boot, parameter and main-blocked architecture, as well as low voltage and
extended cycling. These features provide a highly flexible device suitable for portable terminals and
personal computers. Additionally, the enhanced suspend capabilities provide an ideal solution for both
code and data storage applications. For secure code storage applications, such as networking where
code is either directly executed out of flash or downloaded to DRAM, the device offers four levels of
protection. These are: absolute protection, enabled when VPP ≤ VPPLK; selective hardware blocking;
flexible software blocking; or write protection. These alternatives give designers comprehensive
control over their code security needs. The device is manufactured using 0.25
m process technology.
It comes in chip-size package: the 0.75 mm pitch 48-ball TFBGA, which makes it ideal for small real
estate applications.
2. FEATURES
Low Voltage Operation
VDD = VPP = 2.7V to 3.6V Single Voltage
16bit I/O Interface
High-Performance Read Access Time
90 nS (VDD = 2.7V to 3.6V)
Operating Temperature
-40° C to +85° C
Low Power Management
2 A (VDD = 3.0V)Typical Standby Current
Automatic Power Savings Mode Decreases
ICCR in Static Mode
120 A (VDD = 3.0V, TA =+25° C,
f=32kHz)Typical Read Current
Optimized Array Blocking Architecture
Two 4k-word Boot Blocks
Six 4k-word Parameter Blocks
Thirty-one 32k-word Main Blocks
Top or Bottom Boot Location
Extended Cycling Capability
Minimum 100,000 Block Erase Cycles
Enhanced Automated Suspend Options
Word Write Suspend to Read
Block Erase Suspend to Word Write
Block Erase Suspend to Read
Enhanced Data Protection Features
Absolute Protection with VPP ≤ VPPLK
Block Erase, Full Chip Erase, Word Write
and Lock-Bit Configuration Lockout during
Power Transitions
Block Locking with Command and #WP
Permanent Locking
Automated Block Erase, Full Chip Erase, Low
Power Management Word Write and Lock-Bit
Configuration
Command User Interface (CUI)
Status Register (SR)
SRAM-Compatible Write Interface
Chip-Size Packaging
0.75 mm pitch 48-Ball TFBGA
Nonvolatile Flash Technology
CMOS Process (P-type silicon substrate)
Not designed or rated as radiation hardened
Publication Release Date: April 7, 2003
- 3 -
Revision A4
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