參數(shù)資料
型號: VDP3108PR
英文描述: Consumer IC
中文描述: 消費(fèi)性IC
文件頁數(shù): 27/72頁
文件大?。?/td> 597K
代理商: VDP3108PR
VDP 31xxB
PRELIMINARY DATA SHEET
27
Micronas
phase
comparator
&
lowpass
PLL2
composite
sync
generator
E/W
correction
sawtooth
PWM
15 bit
CSY
E/W
ouput
V
output
V
flyback
PWM
15 bit
DCO
front
sync
interface
FSY
VDATA
main
sync
generator
vertical
serial
data
phase
comparator
&
lowpass
PLL3
1:64
&
output
stage
H
flyback
H
drive
DCO
display
timing
line
counter
blanking, clamping, etc.
clock & control
sinewave
generator
&
DAC
LPF
Standby clock
Fig. 2
28:
Deflection processing block diagram
MSY
vertical reset
skew
measure
ment
M1
M2
(not in scale)
M1
M2
F
V
line
[0]
line
[7]
l[8]
not
used
Parity
input
analog
video
MSY
not
used
not
used
not
used
not
used
timing reference for PICTURE bus
chroma multiplex sync
active picture data after xxx clocks
V:
Vert. blanking
0 = off
1 = on
Field #
0 = Field 1
1 = Field 2
line: Field line #
1...N
F:
Parity
Fig. 2
29:
Main sync format
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