
V350EPC
Copyright 1998, V3 Semiconductor Corp.
V350EPC Data Sheet Rev 1.1
5
2.1
Test Mode Pins
Several device pins are used during manufacturing test to put the V350EPC device into various test
modes.
These pins must be maintained at proper levels during reset to insure proper operation
.
This is typically handled through pull-up or pull-down resistors (typically 1K to 10K) on the signal pins if
they are not guaranteed to be at the proper level during reset. Table 4 below shows the reset states for
test mode pins:
Configuration
Signal
Type
R
Description
RDIR
I
Reset direction. Tie low to drive PRST out and LRST in, high to
drive LRST out and PRST in.
EN5V
I
Selects 5V (EN5V driven low) or 3.3V (EN5V driven high) device
operation modes.
Power and Ground Signals
Signal
Type
R
Description
V
CC
-
POWER leads intended for external connection to a V
CC
board
plane.
GND
-
GROUND leads intended for external connection to a GND board
plane.
a.
R
indicates state during reset.
b. Applies to i960Sx mode.
c. Applies to i960Jx mode.
Table 4: RESET State for Test Mode Pins
Mode
Pin 134
Pin 135
Pin 153
i960Jx
Pull-Down
Pull-Up
Pull-Down
i960Sx
Pull-Down
Pull-Down
Pull-Down
Table 3: Signal Descriptions (cont’d)
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