參數(shù)資料
型號： UPD78F9212CS-CAB-A
廠商： Renesas Electronics America
文件頁數(shù)： 98/175頁
文件大?。?/td> 0K
描述： MCU 8BIT 4KB FLASH 16PIN
標(biāo)準(zhǔn)包裝： 400
系列： 78K0S/Kx1+
核心處理器： 78K0S
芯體尺寸： 8-位
速度： 10MHz
外圍設(shè)備： LVD，POR，PWM，WDT
輸入/輸出數(shù)： 13
程序存儲器容量： 4KB（4K x 8）
程序存儲器類型： 閃存
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 16-DIP（0.300"，7.62mm）
包裝： 托盤
CHAPTER 2 PIN FUNCTIONS
User’s Manual U16994EJ6V0UD
27
2.2 Pin Functions
2.2.1 P20 to P23 (Port 2)
P20 to P23 constitute a 4-bit I/O port. In addition to the function as I/O port pins, these pins also have a function to
input an analog signal to the A/D converter, input/output a timer signal, and input an external interrupt request signal.
P22 and P23 also function as the X2/ANI2 and X1/ANI3, respectively. For the setting method for pin functions, see
CHAPTER 15 OPTION BYTE.
These pins can be set to the following operation modes in 1-bit units.
(1)
Port mode
P20 to P23 function as a 4-bit I/O port. Each bit of this port can be set to the input or output mode by using
port mode register 2 (PM2). In addition, an on-chip pull-up resistor can be connected to the port by using pull-
up resistor option register 2 (PU2).
(2)
Control mode
P20 to P23 function to input an analog signal to the A/D converter, input/output a timer signal, and input an
external interrupt request signal.
(a) ANI0 to ANI3 (
μPD78F921x only)
These are the analog input pins of the A/D converter. When using these pins as analog input pins, refer
to 9.6 Cautions for A/D converter (5) ANI0/P20 to ANI3/P23.
(b) TI000
This pin inputs an external count clock to 16-bit timer/event counter 00, or a capture trigger signal to the
capture registers (CR000 and CR010) of 16-bit timer/event counter 00.
(c) TI010
This pin inputs a capture trigger signal to the capture register (CR000) of 16-bit timer/event counter 00.
(d) TO00
This pin outputs a signal from 16-bit timer/event counter 00.
(e) TOH1
This pin outputs a signal from 8-bit timer H1.
(f) INTP0
This is an external interrupt request input pin for which the valid edge (rising edge, falling edge, or both
rising and falling edges) can be specified.
Caution
The P22/X2/ANI2 and P23/X1/ANI3 pins are pulled down during reset.
<R>
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