參數(shù)資料
型號： UPD78F9212CS-CAB-A
廠商： Renesas Electronics America
文件頁數(shù)： 31/175頁
文件大小： 0K
描述： MCU 8BIT 4KB FLASH 16PIN
標(biāo)準(zhǔn)包裝： 400
系列： 78K0S/Kx1+
核心處理器： 78K0S
芯體尺寸： 8-位
速度： 10MHz
外圍設(shè)備： LVD，POR，PWM，WDT
輸入/輸出數(shù)： 13
程序存儲器容量： 4KB（4K x 8）
程序存儲器類型： 閃存
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 16-DIP（0.300"，7.62mm）
包裝： 托盤
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
User’s Manual U16994EJ6V0UD
124
6.5
Cautions Related to 16-bit Timer/Event Counter 00
(1) Timer start errors
An error of up to one clock may occur in the time required for a match signal to be generated after timer start.
This is because 16-bit timer counter 00 (TM00) is started asynchronously to the count clock.
Figure 6-37. Start Timing of 16-bit Timer Counter 00 (TM00)
TM00 count value
0000H
0001H
0002H
0004H
Count clock
Timer start
0003H
(2) 16-bit timer counter 00 (TM00) operation
<1>
16-bit timer counter 00 (TM00) starts operating as soon as values other than 0 and 0 (operation stop
mode) are set to TMC002 and TMC003, respectively. Set TMC002 and TMC003 to 0 and 0 to stop
operation.
<2>
Even if TM00 is read, the value is not captured by 16-bit timer capture/compare register 010 (CR010).
<3>
When TM00 is read, count misses do not occur, since the input of the count clock is temporarily stopped
and then resumed after the read.
<4>
If the timer is stopped, timer counts and timer interrupts do not occur, even if a signal is input to the
TI000/TI010 pins.
(3) Setting of 16-bit timer capture/compare registers 000, 010 (CR000, CR010)
<1>
Set 16-bit timer capture/compare register 000 (CR000) to other than 0000H in the clear & start mode
entered on match between TM00 and CR000.
This means a 1-pulse count operation cannot be
performed when this register is used as an external event counter.
<2>
When the clear & start mode entered on a match between TM00 and CR000 is selected, CR000 should
not be specified as a capture register.
<3>
In the free-running mode and in the clear & start mode using the valid edge of the TI000 pin, if CR0n0 is
set to 0000H, an interrupt request (INTTM0n0) is generated when CR0n0 changes from 0000H to
0001H after an overflow (FFFFH).
<4>
If the new value of CR0n0 is less than the value of TM00, TM00 continues counting, overflows, and then
starts counting from 0 again. If the new value of CR0n0 is less than the old value, therefore, the timer
must be reset to be restarted after the value of CR0n0 is changed.
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