參數(shù)資料
型號(hào)： UPD61052GD-LML
廠商： NEC Corp.
英文描述： MOS INTEGRATED CIRCUIT MPEG2 AUDIO/VIDEO ENCODER
中文描述： 馬鞍山集成電路MPEG2音頻/視頻編碼器
文件頁數(shù)： 6/106頁
文件大?。?/td> 824K
代理商： UPD61052GD-LML
Data Sheet S15082EJ4V0DS
6
μ
PD61051, 61052
PIN LIST
AMCLK
:Audio Main Clock
MA0 to MA13
:Memory Address
CA0/FA0 to CA5/FA5 :Host CPU Address/
MCAS
:Memory Column Address Strobe
Instruction ROM Address
MCLK
:Memory Clock
CCS
:Host CPU Chip Select
MCLKE
:Memory Clock Enable
CD0/FD0 to CD7/FD7 :Host CPU Data/
MCS
:Memory Chip Select
Instruction ROM Data
MD0 to MD31
:Memory Data
CINT
:Host CPU Interrupt
MDQM
:Memory DQ Mask Enable
CMODE0/CSCLK
:Host CPU Mode/
MRAS
:Memory Row Address Strobe
SPI Clock
MWE
:Memory Write Enable
CMODE1/CSDO
:Host CPU Mode/
NCLK
:N-wire Clock
SPI Data Output
NDI
:N-wire Data Input
CMODE2
:Host CPU Mode
NDO
:N-wire Data Output
CRE
:Host CPU Read Enable
NMOD
:N-wire Mode
CWAIT/FOE
:Host CPU Wait/
NRST
:N-wire Reset
Instruction ROM Output Enable
OABCK
:Output Audio Bit Clock
CWE/CSDI
:Host CPU Write Enable/
OABD
:Output Audio Bit Data
SPI Data Input
OALRCK
:Output Audio LR Clock
GND
:Ground
OS0/FA6 to OS7/FA13 :Output Stream Data/
GPIO0 to GPIO4
:General Purpose IO
Instruction ROM Address
GPO5/OVHSYNC
:General Purpose Output/
OSCLK/OSSTB
:Output Stream Data Clock/
Output Video Horizontal Sync
Output Stream Data Strobe
GPO6/OVVSYNC
:General Purpose Output/
OSREQ
:Output Stream Data Request
Output Video Vertical Sync
OSSYNC
:Output Stream Data Sync
IABCK
:Input Audio Bit Clock
OSVLD/OSRDY
:Output Stream Data Valid/
IABD
:Input Audio Bit Data
Output Stream Data Ready
IALRCK
:Input Audio LR Clock
OVCLK
:Output Video Clock
IS0, IS2 to IS7
:Input Stream Data
OVOUT0/FA14 to
:Output Video Data/
IS1/ISERR
:Input Stream Data/ Input Stream Error
OVOUT5/FA19
Instruction ROM Address
ISCLK/ISSTB
:Input Stream Data Clock/
OVOUT6,OVOUT7
:Output Video Data
Input Stream Data Strobe
PGND
:PLL Ground
ISREQ
:Input Stream Data Request
PSTOP
:PLL Stop
ISSYNC
:Input Stream Data Sync
PV
DD2
:PLL 2.5 V Power Supply
ISVLD
:Input Stream Data Valid
PWM
:PWM Output
IVCLK
:Input Video Clock
RESET
:Reset
IVFLD
:Input Video Field Index
SCLK
:System Clock
IVHSYNC
:Input Video Horizontal Sync
STCLK
:System Time Clock
IVIN0 to IVIN7
:Input Video Data
V
DD2
:2.5 V Power Supply
IVVSYNC
:Input Video Vertical Sync
V
DD3
:3.3 V Power Supply
相關(guān)PDF資料
PDF描述
UPD61052GD-LML-A MOS INTEGRATED CIRCUIT MPEG2 AUDIO/VIDEO ENCODER
UPD6376GS TP Series Rocker Switch, 2 pole, 3 position, IWTS (14-16 Gage) terminal, Above Panel Mounting
UPD6376 AUDIO 2-CHANNEL 16-BIT D/A CONVERTER
UPD7001 8-BIT CMOS SERIAL I/O ANALOG-TO-DIGITAL CONVERTER
UPD7001C 8-BIT CMOS SERIAL I/O ANALOG-TO-DIGITAL CONVERTER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD61052GD-LML-A 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT MPEG2 AUDIO/VIDEO ENCODER
UPD6105C002 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Consumer IC
UPD61171 制造商:NEC 制造商全稱:NEC 功能描述:SECOND GENERATION ENHANCED MULTIMEDIA ARCHITECTURE PROCESSOR FOR DVD RECORDER/PERSONAL VIDEO RECORDERS
UPD61171F1-XYZ-MN2-A 制造商:NEC 制造商全稱:NEC 功能描述:SECOND GENERATION ENHANCED MULTIMEDIA ARCHITECTURE PROCESSOR FOR DVD RECORDER/PERSONAL VIDEO RECORDERS
UPD6120C-101 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Remote-Control Transmitter/Encoder
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*