參數(shù)資料
型號: UPD17201AGF
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH LCD CONTROLLER/DRIVER AND A/D CONVERTER FOR INFRARED REMOTE CONTROL TRANSMITTERS
中文描述: 4位單片機(jī)與LCD控制器/驅(qū)動器和A / D轉(zhuǎn)換器紅外遙控遞質(zhì)
文件頁數(shù): 34/120頁
文件大?。?/td> 516K
代理商: UPD17201AGF
μ
PD17201A, 17207
34
6.1
SWITCHING SYSTEM CLOCK
The system clock can be switched between the main clock and subclock by using the SYSCK flag (RF: address
02H, bit 1) as shown in Fig. 6-1.
(1) Switching from main clock to subclock
The system clock can be changed from the main clock to subclock by resetting the SYSCK flag to “0”.
When NOXT is set by mask option, however, the subclock cannot be selected (SYSCK and XEN cannot be
reset to “0”).
Caution When turning on the power, make sure that a sufficient time elapses to stabilize the
oscillation of the subclock (confirm that the IRQWTM flag (RF: address 3CH, bit 2) is set by
the program at a specific cycle).
(2) Switching from subclock to main clock
The system clock can be changed from the subclock to the main clock by setting the SYSCK flag to “1”.
When NOX is set by mask option, however, the main clock cannot be selected (SYSCK and XEN cannot be
set to “1”).
Caution Before setting the SYSCK flag, make sure that at least 10 ms elapses after the XEN flag has
been set to “1” so that the oscillation stabilizes.
6.2
MAIN CLOCK OSCILLATION CONTROL FUNCTION
When the subclock is used as the system clock, oscillation of the main clock can be controlled by manipulating
the XEN flag (RF: address 02H, bit 0).
If the system clock is changed from the subclock to main clock (by setting the SYSCK flag) after the main clock
is started (by setting the XEN flag), make sure that an oscillation stabilization time of about 10 ms elapses.
Caution Do not manipulate the XEN and SYSCK flags simultaneously (execute the POKE instruction
twice).
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