參數(shù)資料
型號(hào): UPD16835AGS-BGG
廠商: NEC Corp.
英文描述: MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT
中文描述: 單片四H橋驅(qū)動(dòng)電路
文件頁數(shù): 22/32頁
文件大?。?/td> 227K
代理商: UPD16835AGS-BGG
Data Sheet S15973EJ1V0DS
22
μ
PD16835A
6. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings (T
A
= 25
°
C)
Parameter
Symbol
Condition
Rating
Unit
V
DD
0.5 to +6.0
V
Supply voltage
V
M
0.5 to +11.2
V
Input voltage
V
IN
0.5 to V
DD
+ 0.5
V
Reference voltage
V
REF
500
±
150
±
300
mV
H bridge drive current
Note 1
I
M(DC)
DC
PW
10 ms, Duty
5%
mA/phase
Instantaneous H bridge drive
current
Note 1
I
M(pulse)
mA/phase
Power consumption
Note 2
P
T
1.0
W
°
C
°
C
Peak junction temperature
T
CH(MAX.)
150
Storage temperature
T
stg
55 to +150
Notes 1.
Permissible current per phase with the IC mounted on a PCB.
2.
When the IC is mounted on a glass epoxy PCB (10 cm x 10 cm x 1 mm).
Caution
If the absolute maximum rating of even one of the above parameters is exceeded even
momentarily, the quality of the product may be degraded. Absolute maximum ratings, therefore,
specify the values exceeding which the product may be physically damaged. Be sure to use the
product within the range of the absolute maximum ratings.
Recommended Operating Range
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
V
DD
2.7
5.5
V
Supply voltage
V
M
4.8
11
V
Input voltage
V
IN
0
V
DD
V
Reference voltage
V
REF
225
250
275
mV
EXP pin input voltage
V
EXPIN
V
DD
V
μ
A
mA
EXP pin input current
I
EXPIN
100
H bridge drive current
I
M(DC)
100
200
3.9
+100
H bridge drive current
I
M(pulse)
Note 1
+200
mA
Clock frequency (OSC
IN
)
f
CLK
Note 2
4
4.2
MHz
Clock frequency amplitude
V
fCLK
Note 2
0.7 V
DD
V
DD
V
Serial clock frequency (SCLK)
f
SCLK
5.0
MHz
Video sync signal width
PW
(VD)
Note 3
250
ns
LATCH signal wait time
t
(VD-LATCH)
Note 4
400
ns
SCLK wait time
t
(SCLK-LATCH)
Note 4
400
ns
SDATA setup time
t
setup
Note 4
80
ns
SDATA hold time
t
hold
Note 4
80
ns
Chopping frequency
f
OSC
Note 3
32
124
kHz
μ
s
°
C
°
C
Reset signal pulse width
t
RST
100
10
Operating temperature
T
A
+70
Peak junction temperature
Notes 1.
PW
10 ms, duty
5%
2.
C
OSC
= 33 pF, V
REF
= 250 mV
3.
f
CLK
= 4 MHz
4.
Serial data delay time(see the figure on the next page.)
T
CH(MAX.)
125
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