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| 型號(hào)： | UPD16835AGS-BGG |
| 廠商： | NEC Corp. |
| 英文描述： | MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT |
| 中文描述： | 單片四H橋驅(qū)動(dòng)電路 |
| 文件頁(yè)數(shù)： | 21/32頁(yè) |
| 文件大?。?/td> | 227K |
| 代理商： | UPD16835AGS-BGG |
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Data Sheet S15973EJ1V0DS
21
μ
PD16835A
Cautions on Correct Use
(1) With this product, input the data for start up wait and start up drive wait. Because the standard data are
set or updated by these wait times, if the start up wait time and start up drive wait time are not input, the
data are not updated.
(2) The start up wait time must be longer than LATCH.
(3) If the rising of the start up drive wait time is the same as the falling of the last output pulse, a count error
occurs, and the IC may malfunction.
(4) Input the initial data in a manner that it does not straddle the video sync signal (V
D
). If it does, the initial
data is not latched.
(5) Transmit the standard data during the start up wait time (FF1). If it is input at any other time, the data
may
not be transmitted correctly.
(6) If the LGND potential is undefined, the data may not be input correctly. Keep the LGND potential to the
minimum level. It is recommended that LGND and PGND be divided for connection (single ground) to
prevent the leakage of noise from the output circuit.
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