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參數(shù)資料
| 型號： | TSS463R |
| 英文描述： | Industrial Control IC |
| 中文描述： | 工業(yè)控制IC |
| 文件頁數(shù)： | 4/52頁 |
| 文件大?。?/td> | 268K |
| 代理商： | TSS463R |
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TSS461C
4
Rev. D (22 Feb 01)
4. Pinout
The TSS461C is available in SOP 24 package. Figure 2. shows the pinout. The names in parenthesis refer to the
functionalities in MOTOROLA mode.
Possibilities exist to supply the TSS461C in a PDIL 24 package.
5. Microprocessor Interface
The processor controls the TSS461C by reading and writing the internal registers of the circuit. These registers appear
to the processor as regular memory locations.
5.1. Interface Modes
The TSS461C must be plugged in an INTEL or MOTOROLA environment with an 8
–
bit address/data bus multiplexed.
Table 1. Access Mode Logic
CS (E)
RD
WR (R/W)
Operation Mode
0
No operation
1
0
0
Write operation in MOTOROLA mode
1
0
1
Read operation in both mode
1
1
0
Write operation in INTEL mode
1
1
1
No operation
In INTEL environment, access operations need CS active, a read one with RD active, a write one with WR active. If
TSS461C is the single peripheral in the processor space, CS can be hired to Vcc.
In MOTOROLA environment, the RD pin is tired to VSS and the access operations are driven by CS (E). Contrrary
to INTEL mode, CS (E) must never be hired to Vcc even if the TSS461C is alone.
To switch on the fly from one mode to the other, CS must be inactive.
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