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參數資料
| 型號： | TSS463R |
| 英文描述： | Industrial Control IC |
| 中文描述： | 工業(yè)控制IC |
| 文件頁數： | 19/52頁 |
| 文件大?。?/td> | 268K |
| 代理商： | TSS463R |
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TSS461C
19
Rev. D (22 Feb 01)
Transmission diagnosis
The transmission compares RxD1 and RxD2 inputs (through the input comparators and the filters) with the data
transmitted on TxD output.
At a time when the transmission logic generates a dominant - recessive transition, the inputs can give different
values. Taking into account the filtering delay, the bus line seen as dominant is assumed to be correct, the other one,
recessive, is considered faulty. The diagnosis mode is changed to reflect that.
Protocol fault
The protocol fault is detected by counting the number of consecutive dominant timeslots.
If eight consecutive timeslots are dominant, the diagnosis mode will change to the major error mode.
8.3. Generation of Internal Signals
8.3.1. RI Signal (Return to Idle)
This signal is used to return to nominal mode in the three specified selection modes (see sections 8.1. and 8.4.). The
RI signal is disabled in automatic selection mode.
The RI signal is a pulse generated when an EOF is detected. So, at the end of each frame, the user, regarding the
diagnosis status bit Sa, Sb & Sc, can make its own choice.
8.3.2. SDC Signal (Synchronous Diagnosis Clock)
This time base is used by diagnosis system in automatic selection mode (see section 8.4. ) when no event is recorded
on the bus.
The SDC is generated either by a special SDC divider connected to the timeslot clock, either manually. The SDC clock
period must be long compared to the timeslot duration.
A typical SDC period should be greater than the maximum frame length appearing on the VAN network.
8.3.3. TIP Signal (Transmission In Progress)
This signal must be enabled to allow the transmission diagnosis (see section 8.2.2.).
The TIP turns on synchronously with the beginning of the transmission:
for asynchronous bus access, the beginning of SOF,
for synchronous bus access, the beginning of the identifier field,
for a requestee of in frame reply, the RTR bit of the command field.
The TIP turns off synchronously with the end of the transmission:
after EOF
after a losing of arbitration or a code violation detection
for a requestor of in frame reply, when the arbitration is lost on RTR the bit.
This signal is not generated when the transmission logic only sends an ACK.
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| TSS461E | VAN Data Link Controller |
| TSS461E-TDRA-9 | VAN Data Link Controller |
| TSS461E-TERA-9 | VAN Data Link Controller |
| TSS461E-TRDZ-9 | VAN Data Link Controller |
| TSS461F | VAN Data Link Controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TSS463VAN | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:Van Controller Serial Interface |
| TSS47 | 功能描述:瓷片電容器 100V 20% 0.047uF RoHS:否 制造商:Vishay/Cera-Mite 電容:0.01 uF 容差:20 % 電壓額定值:3 kV 工作溫度范圍:- 25 C to + 105 C 損耗因數 DF: 端接類型:Radial 產品:High Voltage Ceramic Disc Capacitors |
| TSS4B01G | 功能描述:整流器 4.0 Amp 50 Volt 150 Amp IFSM RoHS:否 制造商:Vishay Semiconductors 產品:Standard Recovery Rectifiers 配置: 反向電壓:100 V 正向電壓下降: 恢復時間:1.2 us 正向連續(xù)電流:2 A 最大浪涌電流:35 A 反向電流 IR:5 uA 安裝風格:SMD/SMT 封裝 / 箱體:DO-221AC 封裝:Reel |
| TSS4B01G C2 | 制造商:SKMI/Taiwan 功能描述:Diode Rectifier Bridge Single 50V 4A 4-Pin TS4B Tube |
| TSS4B01G_1 | 制造商:TSC 制造商全稱:Taiwan Semiconductor Company, Ltd 功能描述:Single Phase 4.0 Amps. Glass Passivated Super Fast Bridge Rectifiers |
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