參數(shù)資料
型號(hào)： TRK-MPC5604P
廠商： Freescale Semiconductor
文件頁數(shù)： 59/104頁
文件大?。?/td> 0K
描述： 5604P TTK BD
設(shè)計(jì)資源： TRK-MPC5604P Component List
TRK-MPC5604P Schematic
標(biāo)準(zhǔn)包裝： 1
系列： MPC56xx
類型： MCU
適用于相關(guān)產(chǎn)品： MPC5604P
所含物品： 板，線纜，CD，DVD
MPC5604P Microcontroller Data Sheet, Rev. 8
Freescale
58
3.10.4
Input DC electrical characteristics definition
Figure 13 shows the DC electrical characteristics behavior as function of time.
2 “SR” parameter values must not exceed the absolute maximum ratings shown in Table 7.
Table 22. Supply current (3.3 V, NVUSRO[PAD3V5V] = 1)
Symbol
C
Parameter
Conditions
Value
Unit
Typ
Max
IDD_LV_CORx T
Su
ppl
ycurren
t
RUN—Maximum mode1
1 Maximum mode: FlexPWM, ADCs, CTU, DSPI, LINFlex, FlexCAN, 15 output pins, 1st and 2nd PLL enabled. I/O
supply current excluded.
VDD_LV_CORx
externally forced at 1.3 V
40 MHz
62
77
mA
64 MHz
71
89
RUN—Typical mode2
2 Typical mode: DSPI, LINFlex, FlexCAN, 15 output pins, 1st PLL only. I/O supply current excluded.
40 MHz
45
56
64 MHz
53
66
P
RUN—Maximum mode3
3 Code fetched from RAM, PLL_0: 64 MHz system clock (x4 multiplier with 16 MHz XTAL), PLL_1 is ON at
PHI_div2 = 120 MHz and PHI_div3 = 80 MHz, auxiliary clock sources set that all peripherals receive maximum
frequency, all peripherals enabled.
VDD_LV_CORx
externally forced at 1.3 V
64 MHz
60
75
HALT mode4
4 Halt mode configurations: code fetched from RAM, code and data flash memories in low power mode,
OSC/PLL_0/PLL_1 are OFF, core clock frozen, all peripherals are disabled.
VDD_LV_CORx
externally forced at 1.3 V
—1.5
10
STOP mode5
5 STOP “P” mode Device Under Test (DUT) configuration: code fetched from RAM, code and data flash memories
OFF, OSC/PLL_0/PLL_1 are OFF, core clock frozen, all peripherals are disabled.
VDD_LV_CORx
externally forced at 1.3 V
—1
10
IDD_FLASH T
Flash during read on single mode
VDD_HV_FL at 3.3 V
—
8
10
Flash during erase operation on
single mode
VDD_HV_FL at 3.3 V
—
10
12
IDD_ADC
T
ADC—Maximum mode1
VDD_HV_ADC0 at 3.3 V
VDD_HV_ADC1 at 3.3 V
fADC =16MHz
ADC_1
2.5
4
ADC_0
2
4
ADC—Typical mode2
ADC_1
0.8
1
ADC_0 0.005 0.006
IDD_OSC
T
Oscillator
VDD_OSC at 3.3V
8MHz
2.4
3
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