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參數(shù)資料
| 型號： | TPS56100PWPR |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Voltage-Mode SMPS Controller |
| 中文描述： | 電壓模式開關(guān)電源控制器 |
| 文件頁數(shù)： | 24/34頁 |
| 文件大?。?/td> | 811K |
| 代理商： | TPS56100PWPR |
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TPS56302
DUAL-OUTPUT LOW-INPUT-VOLTAGE
DSP POWER SUPPLY CONTROLLER WITH SEQUENCING
SLVS289A
–
MARCH 2000
–
REVISED OCTOBER 2000
24
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
hysteresis window
The changeable hysteresis window in TPS56302 is used for switching frequency and output voltage ripple
adjustment. The hysteresis window setup is decided by a two-resistor voltage divider on VREFB and VHYST
pin. Two times the voltage drop on the top resistor is the hysteresis window. The formula is shown in the
following:
)
13
R
11
R
13
R
1
(
VREFB
2
+
–
×
×
=
V
hyswindow
Where V
hyswindow
is the hysteresis window (V); VREFB is the regulated voltage from VREVB (pin 5); R11 is the
top resistor in the voltage divider; R13 is the bottom resistor in the voltage divider. The maximum hysteresis
window is 60 mV.
slow-start
Slow-start reduces the start-up stresses on the power-stage components and reduces the input current surge.
The minimum slow-start time is limited to 1 ms due to the power good function deglitch time. Slow-start timing
is dependent on the timing capacitor value on the slow-start pin and the total resistance on VREFB. The
following formula can be used for setting the slow-start timing:
TSLOW-START
5
CSLOW-START
RVREFB
T
SLOW-START
is the slow-start time; C
SLOW-START
is the capacitor value on SLOWST (pin 3). R
VREFB
is the total
resistance on VREFB (pin 5).
current limit
Current limit is implemented using the on-resistance of the upper FETs as the sensing elements. The IOUT
signal is used for the current limit and the droop function. The voltage at IOUT at the output current trip point
will be:
VIOUT
RON
IO
2
R
ON
is the high-side on-time resistance; I
O
is the output current. The current limit is calculated by using the
equation:
R5
R4
IO MAX
2
RON
0.125
0.125
Where R4 is the bottom resistor in the voltage divider on OCP pin, and R5 is the top resistor; I
O(MAX)
is the
maximum current allowed; R
ON
is the high-side FET on-time resistance.
Since the FET on-time resistance varies according to temperature, the current limit is basically for catastrophic
failure.
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