參數(shù)資料
型號: TPS56100PWPR
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Voltage-Mode SMPS Controller
中文描述: 電壓模式開關(guān)電源控制器
文件頁數(shù): 21/34頁
文件大?。?/td> 811K
代理商: TPS56100PWPR
TPS56302
DUAL-OUTPUT LOW-INPUT-VOLTAGE
DSP POWER SUPPLY CONTROLLER WITH SEQUENCING
SLVS289A
MARCH 2000
REVISED OCTOBER 2000
21
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
evaluation module
In many DSP applications, the voltage bus powering DSP I/O also has to power peripheral circuitry. The total
current is much higher than the requirement for the I/O only. This is the reason to use the high-efficiency ripple
regulator to power I/O. In turn, the core power is delivered by LDO output. Since the I/O voltage is lower than
the input voltage in cases such as 5-V input, but higher than the core voltage, the ripple regulator output should
be used as the input voltage for LDO to achieve higher efficiency. In EVM testing, J1
4 (RR
OUT) is connected
to J2
1(VI
LDO). The test results displayed in this section are all based on this configuration.
JP2
JP1
P
U1
TPS563xxPWP
JP3
TP8
TP7
E1
Q1:A
Q4
TP11
TP3
TP1
Q1:B
Q5
+
TP2
FB2
J2
+
+
TP6
TP5
FB1
+
+
+
TP10
+
L1
3.3 uH
+
+
TP4
J1
R17
When an output current greater than 4 A is desired on the ripple regulator, please add a 10
resistor (R17) between pin 18 and Q1:A.
Because the EVM is configured for 4 A and below, R17 is 0
and is not included on the module.
Figure 22. EVM Schematic
Table 2. EVM Input and Outputs
VIN
5 V
IIN
4 A
VRR
3.3 V
IRR
4 A
VLDO
1.8 V
ILDO
0.5 A
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