參數(shù)資料
型號： TP6508
英文描述： Pushbutton Switch; Actuator Diameter:0.078"; Circuitry:6PDT; Switch Operation:6 Changeover Push-Push; Contact Current Max:100mA; Leaded Process Compatible:Yes; Mounting Type:PCB; Switch Function:6PDT
中文描述： 顯卡
文件頁數(shù)： 88/134頁
文件大小： 600K
代理商： TP6508
P.85
Graphics Engine Control Register Description
The following registers with 16-bit data width are Topro VGA Graphics Engine control regis-
ters. There are two addressing types, base addressing, and memory map I/O addressing, to access
these registers.
By base addressing, these registers are accessed at Port binary address xxxx,xxYY,YYYY,YY00.
The address value - ‘Y..’ is determined by Graphics Engine Port Address Low Register. They are set
default hex. F1 and F3. The high address value - ‘xx’ is determined by following Graphics Engine
control register indexed value. Then Topro VGA can access these registers with 16-bit data width by
decoding at them, being conjunction with ‘x..’ and ‘Y..’ , directly .
By memory map I/O addressing, these registers are accessed as memory command and located at
memory address binary ZZZZ,ZZZZ,xxxx,xxYY,YYYY,YY00. The ‘Y..’ and ‘x..’ are as same as the
decription of previours paragraph. The address value - ‘Z..’ is determined by Extended register-
Memory Mapping I/O Offset Register and it is set default Hex 00.
For PCI system access, the GEC. regs. are addressed at by setting PREG 14 and the PCI port
address low which is described in the following GEC. register description. The PCI configuration
register PREG 14 is used as the higher 8-bit port address and the PCI port address low is defined as
the lower 8-bit port address for PCI local bus.
GAREG Hex 01 : Source X Offset Register
This is a read/write register.
Default value after hardware reset is Hex 00,00.
Default port address 07C4.
PCI port address low 04.
D0-10
D11-15
Source X bit 0 to 10
Reserved
Bit 0-10
These bits would use to define source X screen position and transfer to memory address for BITBLT
operations. Also, these bits are use to define starting X screen position for Line Drawing operations.
Reserved .
Bit 11-15
GAREG Hex 02 : Source Y Offset Register
This is a read/write register.
Default value after hardware reset is Hex 00,00.
Default port address 0BC4.
PCI port address low 08.
D0-10
D11-15
Source Y bit 0 to 10
Reserved
Bit 0-10
These bits would use to define source Y screen position and transfer to memory address for BITBLT
operations. Also, these bits are use to define starting Y screen position for Line Drawing operations.
Reserved .
Bit 11-15
GAREG Hex 03 : Pattern X Offset Register
This is a read/write register.
Default value after hardware reset is Hex 00,00.
Default port address 0FC4.
PCI port address low 0C.
D0-15
Line drawing pattern bit 0 to 15
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