參數(shù)資料
型號(hào)： TP6508
英文描述： Pushbutton Switch; Actuator Diameter:0.078"; Circuitry:6PDT; Switch Operation:6 Changeover Push-Push; Contact Current Max:100mA; Leaded Process Compatible:Yes; Mounting Type:PCB; Switch Function:6PDT
中文描述： 顯卡
文件頁(yè)數(shù)： 19/134頁(yè)
文件大?。?/td> 600K
代理商： TP6508
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)當(dāng)前第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)
P15
V. Pin Descriptions
SD[15:0]
I/O
8maR
SA[16:2]
SA[1:0]
I (I/O)
I
-
LA[23:22]
A21
A20
LA[19:17]
AEN
I
I (I/O)
I
I (I/O)
I
(I/O)
-
-
ALE
I
-
SBHE*
I
-
IORD*
I
(I/O)
I
(I/O)
-
IOWR*
-
MEMR*
I
-
MEMW*
I
-
IORDY*
OT
12maR
IOCS16*
OT
(I/O)
12maR
MEMCS16*
OT
(I/O)
I/S
12maR
RESET*
-
IRQ
OT
(I/O)
I
8maR
REF*
-
OWS*
OT
(I/O)
8maR
33,34,35,36,37
38,40,41,44,45
46,47,48,49,50,51
195,194,193,192,191,
190,189,188,187,186,
185,183,182,180,179,
21,43
28,201,200,199,198,
197,196
31
22
32
27
25
11
23
24
18
19
207
30
10
20
True
True
True
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
These signals provide 16 data bits transfer on
ISA bus with system microprocessor.
Address Bit 16 Through 0 are used to
address frame buffer and I/O ports with TP6508.
Address Bit 23 Through 17 are used to
address frame buffer and I/O ports with TP6508.
In general ,these signals are not gated address
LA[19:17]
A high active signal used to detect the TP6508
from the I/O channel to avoid a disturbance from
the DMA controller.
This signal is used to latch those ungated ad-
dress bus.
It indicates and enables transfer of data on the
high byte of data bus and is used with A0 to dis-
tinguish between high and low byte.
I/O read signal comes from a host micropro-
cessor to read data from TP6508 control.
I/O write signal comes from a host micropro-
cessor to read data from TP6508 control regis-
ters.
Memory read signal comes from a host
microprocessor to read data from video
memory.
Memory write signal comes from a host
microprocessor to read data from video
memory.
This signal is driven low by TP6508 to lengthen
the memory or I/O accessed cycle.
This signal is driven low to indicate that the
TP6508 can execute an I/O operation at the ad-
dress currently on the 16-bit bus mode.
This signal drives a 16-bit memory cycle for
16-bit bus data transfer.
This pin is connected to the signal that was in-
verted from the system board to reset the
TP6508.
The vertical retrace interrupt.
This signal is driven by system mother board
logic and is used to indicate a memory
refresh cycle is in operation.
This signal is driven by TP6508 to short the
memory accessed cycle for improving system
performance.
* ISA Bus Interface (54 pins)
Symble Type Drive Pin Number Active Function
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