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參數(shù)資料
| 型號： | TNETA1556 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 155.52-Mbit/S Clock-Recovery Device(155.52-MBIT/S時鐘恢復(fù)裝置) |
| 中文描述： | 155.52 - Mbit / s的時鐘恢復(fù)裝置（155.52 - Mbit / s的時鐘恢復(fù)裝置） |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 216K |
| 代理商： | TNETA1556 |
TNETA1556
155.52-MBIT/S CLOCK-RECOVERY DEVICE
SDNS015C – FEBRUARY 1994 – REVISED JUNE 1995
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
RMS jitter
This test provides a measure of the internal jitter performance of the clock-recovery circuit. A data stream with
very low jitter (all data generators have a small amount of jitter) is input to the clock-recovery device, and the
jitter of the recovered clock is measured. A 2
31
–1 pseudo-random bit sequence (PRBS) is used for the input
data stream. For this test, the worst-case jitter performance was measured with V
CC
= 4.75 V at a free-air
operating temperature of 85
°
C. Table 1 summarizes these test results.
Table 1. Worst-Case RMS Jitter Measurement, V
CC
= 4.75 V, T
A
= 85
°
C
DEVICE NO.
Jitter (
°
RMS)
1
2
3
4
5
6
7
8
9
3.5
3.2
3.5
3.3
3.1
3.5
3.1
3
3.4
jitter tolerance
Jitter tolerance is a measure of the ability of the clock-recovery circuit to tolerate an input signal without
experiencing a bit error. For this test, the Bellcore SONET category II jitter-tolerance mask was used (Bellcore
specification TR-NWT-000253). The worst-case performance was measured with V
CC
= 5.25 V at a free-air
temperature of 85
°
C. Table 2 and Figure 2 show the results for this test.
Table 2. Jitter-Tolerance Values Used in the Graph of Figure 2
FREQUENCY
H3
10
BELLCORE
TNETS1556
15
NA
30
15
NA
300
1.5
10
1k
1.5
10
2k
1.5
10
5k
0.81
10
10k
0.3
1
20k
0.15
1
50k
0.15
1
100k
0.15
0.658
200k
0.15
0.382
500k
0.15
0.34
1m
0.15
0.536
2m
0.15
0.515
3.5m
0.15
0.486
4m
0.15
0.493
P
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