![](http://datasheet.mmic.net.cn/Texas-Instruments/TMS470R1A384PZQ_datasheet_99827/TMS470R1A384PZQ_40.png)
OUTPUT TIMINGS
Switching Characteristics for Output Timings versus Load Capacitance (CL)
tf
tr
VCC
80%
20%
0
Output
SPNS110E – AUGUST 2005 – REVISED MAY 2008 ......................................................................................................................................................... www.ti.com
PARAMETER
MIN
MAX
UNIT
CL = 15 pF
2.5
8
CL = 50 pF
5
14
tr
Rise time, AWD, CLKOUT, RST, TD0/GIOC[6]
ns
CL = 100 pF
9
23
CL = 150 pF
13
32
CL = 15 pF
2.5
8
CL = 50 pF
5
14
tf
Fall time, AWD, CLKOUT, TDO/GIOC[6]
ns
CL = 100 pF
9
23
CL = 150 pF
13
32
CL = 15 pF
3
10
CL = 50 pF
3.5
12
tr
Rise time, 4-mA 5-V tolerant pins
ns
CL = 100 pF
7
21
CL = 150 pF
9
28
CL = 15 pF
2
8
CL = 50 pF
2.5
9
tf
Fall time, 4-mA 5-V tolerant pins
ns
CL = 100 pF
8
25
CL = 150 pF
11
35
CL = 15 pF
2.5
10
CL = 50 pF
6.0
25
tr
Rise time, all other output pins
ns
CL = 100 pF
12
45
CL = 150 pF
18
65
CL = 15 pF
3
10
CL = 50 pF
8.5
25
tf
Fall time, all other output pins
ns
CL = 100 pF
16
45
CL = 150 pF
23
65
Figure 11. CMOS-Level Outputs
40
Copyright 2005–2008, Texas Instruments Incorporated