參數(shù)資料
型號(hào): TMS320LF2407APGEA
廠商: TEXAS INSTRUMENTS INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 16-BIT, 20 MHz, OTHER DSP, PQFP144
封裝: GREEN, PLASTIC, LQFP-144
文件頁(yè)數(shù): 81/134頁(yè)
文件大?。?/td> 1724K
代理商: TMS320LF2407APGEA
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TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A
TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A
DSP CONTROLLERS
SPRS145L JULY 2000 REVISED SEPTEMBER 2007
50
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
enhanced analog-to-digital converter (ADC) module (continued)
The ADC module in the 240xA has been enhanced to provide flexible interface to event managers A and B. The
ADC interface is built around a fast, 10-bit ADC module with a total minimum conversion time of 375 ns
(S/H + conversion). The ADC module has 16 channels, configurable as two independent 8-channel modules
to service event managers A and B. The two independent 8-channel modules can be cascaded to form a
16-channel module. Although there are multiple input channels and two sequencers, there is only one converter
in the ADC module. Figure 12 shows the block diagram of the 240xA ADC module.
The two 8-channel modules have the capability to autosequence a series of conversions, each module has the
choice of selecting any one of the respective eight channels available through an analog MUX. In the cascaded
mode, the autosequencer functions as a single 16-channel sequencer. On each sequencer, once the
conversion is complete, the selected channel value is stored in its respective RESULT register. Autosequencing
allows the system to convert the same channel multiple times, allowing the user to perform oversampling
algorithms. This gives increased resolution over traditional single-sampled conversion results.
Result Registers
EVB
S/W
ADCSOC
EVA
S/W
Sequencer 2
Sequencer 1
SOC
ADC Control Registers
70B7h
70B0h
70AFh
70A8h
Result Reg 15
Result Reg 8
Result Reg 7
Result Reg 1
Result Reg 0
(375 ns MIN)
Module
ADC
10-Bit
Analog MUX
ADCIN00
ADCIN07
ADCIN08
ADCIN15
Figure 12. Block Diagram of the 240xA ADC Module
To obtain the specified accuracy of the ADC, proper board layout is critical. To the best extent possible, traces
leading to the ADCINn pins should not run in close proximity to the digital signal paths. This is to minimize
switching noise on the digital lines from getting coupled to the ADC inputs. Furthermore, proper isolation
techniques must be used to isolate the ADC module power pins (such as VCCA, VREFHI, and VSSA) from the
digital supply. Unused ADC inputs should be connected to analog ground for improved accuracy and ESD
protection.
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