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參數(shù)資料
| 型號(hào)： | TMS320LC545 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | Digital Signal Processors(20/25ns指令周期， 高性能，大并行度，特殊指令集可有效實(shí)現(xiàn)多種復(fù)雜算法及應(yīng)用的DSP) |
| 中文描述： | 數(shù)字信號(hào)處理器（20/25ns指令周期，高性能，大并行度，特殊指令集可有效實(shí)現(xiàn)多種復(fù)雜算法及應(yīng)用的數(shù)字信號(hào)處理器） |
| 文件頁(yè)數(shù)： | 28/107頁(yè) |
| 文件大小： | 2149K |
| 代理商： | TMS320LC545 |
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TMS320C54x, TMS320LC54x
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS039A – FEBRUARY 1996 – REVISED JULY 1997
25
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
program memory
The external program memory space on the ’C54x/’LC54x devices addresses up to 64K 16-bit words. Software
can configure their memory cells to reside inside or outside of the program address map. When the cells are
mapped into program space, the device automatically accesses them when their addresses are within bounds.
When the program-address generation (PAGEN) logic generates an address outside its bounds, the device
automatically generates an external access. The advantages of operating from on-chip memory are as follows:
Higher performance because no wait states are required
Lower cost than external memory
Lower power than external memory
The advantage of operating from off-chip memory is the ability to access a larger address space.
program memory address map
The reset, interrupt, and trap vectors are addressed in program space. These vectors are soft — meaning that
the processor, when taking the trap, loads the program counter (PC) with the trap address and executes the
code at the vector location. Four words are reserved at each vector location to accommodate a delayed branch
instruction, and either two 1-word instructions or one 2-word instruction, which allows branching to the
appropriate interrupt service routine without the overhead.
At device reset, the reset, interrupt, and trap vectors are mapped to address FF80h in program space. However,
these vectors can be remapped to the beginning of any 128-word page in program space after device reset.
This is done by loading the interrupt vector pointer (IPTR) bits in the PMST register with the appropriate
128-word page boundary address. After loading IPTR, any user interrupt or trap vector is mapped to the new
128-word page. For example:
STM
This example moves the interrupt vectors to program space at address 05800h. Any subsequent interrupt
(except for a device reset) fetches its interrupt vector from that new location. For example, if, after loading the
IPTR, an INT2 occurs, the interrupt service routine vector is fetched from location 5848h in program space as
opposed to location FFC8h. This feature facilitates moving the desired vectors out of the boot ROM and then
removing the ROM from the memory map. Once the system code is booted into the system from the boot-loader
#05800h,PMST
;Remapped vectors to start at 5800h.
code resident in ROM, the application reloads the IPTR with a value pointing to the new vectors. In the previous
example, the STM instruction is used to modify the PMST. Note that the STM instruction modifies not only the
IPTR but other status/control bits in the PMST register.
NOTE: The hardware reset (RS) vector cannot be remapped, because the hardware reset loads the IPTR with 1s. Therefore, the reset vector
is always fetched at location FF80h in program space. In addition, for the ’C54x/’LC54x, 128 words are reserved in the on-chip ROM for
device-testing purposes. Application code written to be implemented in on-chip ROM must reserve these 128 words at addresses
FF00h–FF7Fh in program space.
extended program memory (’LC548 only)
The ’LC548 devices use a paged extended memory scheme in program space to allow access of up to 8M of
program memory. This extended program memory is organized into 128 pages (0–127), each 64K in length.
To implement the extended program memory scheme, the ’LC548 device includes the following additional
features:
Seven additional address lines (for a total of 23)
An extra memory-mapped register [program counter extension register (XPC)]
A
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| TMS320LC545APBK-50 | 功能描述:IC FIXED POINT DSP 128-LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:TMS320C54x 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤(pán) 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
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