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參數(shù)資料
| 型號(hào)： | TMP96C141AF |
| 廠商： | Toshiba Corporation |
| 英文描述： | High Speed Advanced CMOS 16-bit Microcontroller For Controlling Medium to Large-Scale Equipment(用于中等到大型設(shè)備控制，高速、先進(jìn)的 CMOS 16位微控制器) |
| 中文描述： | 采用先進(jìn)的CMOS高速16位微控制器控制中的大型設(shè)備（用于中等到大型設(shè)備控制，高速，先進(jìn)的的CMOS 16位微控制器） |
| 文件頁(yè)數(shù)： | 95/178頁(yè) |
| 文件大?。?/td> | 5667K |
| 代理商： | TMP96C141AF |
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TOSHIBA CORPORATION
95
TMP96C141AF
When T4MOD <CAP12M1, 0>/T5MOD
<CAP34M1, 0> = 01
Data is loaded to CAP1, CAP3 at the rise edge
of TI4 pin (also used as P80/INT4) and TI6 pin (also
used as P84/INT6) input, while data is loaded to
CAP2, CAP4 at the rise edge of TI5 pin (also used as
P81/INT5 and TI7 pin (also used as P85/INT7) input.
(Time difference measurement)
When T4MOD <CAP12M1, 0>/T5MOD
<CAP34M1, 0> = 10
Data is loaded to CAP1 at the rise edge of TI4
pin input and to CAP3 at the rise edge of TI6, while
to CAP2, CAP4 at the fall edge. Only in this setting,
interrupt INT4/INT6 occurs at fall edge. (Pulse width
measurement)
When T4MOD <CAP12M1, 0>/T5MOD
<CAP34M1, 0> = 11
Data is loaded to CAP1, CAP3 at the rise edge
of timer flip-flop TFF1, while to CAP2, CAP4 at the
fall edge.
Besides, the value of up-counter can be loaded
to capture registers by software. Whenever “0” is
written in T4MOD <CAPIN>, T5MOD <CAP31N> the
current value of up-counter will be loaded to capture
register CAP1/CAP3. It is necessary to keep the
prescaler in RUN mode (TRUN <PRRUN> to be “1”).
Comparator
These are 16-bit comparators which compare the
up-counter UC4/UC5 value with the set value of (TREG4,
TREG5)/(TREG6, TREG7) to detect the match. When a
match is detected, the comparators generate an interrupt
(INTT4, INTT5)/(INTT6, INTT7) respectively. The up-
counter UC4/UC5 is cleared only when UC4/UC5
matches TREG5/TREG7. (The clearing of up-counter
UC4/UC5 can be disabled by setting T4MOD <CLE>/
T5MOD <CLE> = 0.)
Timer Flip-Flop (TFF4/TFF6)
This flip-flop is inverted by the match detect signal
from the comparators and the latch signals to the cap-
ture registers. Disable/enable of inversion can be set for
each element by T4FFCR <CAP2T4, CAP1T4, EQ5T4,
EQ4T4>/T6FFCR <CAP4T6, CAP3T6, EQ7T6, EQ6T6>.
TFF4/TFF6 will be inverted when “00” is written in
T4FFCR <TFF4C1, 0>/T6FFCR <TFF6C1, 0>. Also it is
set to “1” when “10” is written, and cleared to “0” when
“10” is written. The value of TFF4/TFF6 can be output to
the timer output pin TO4 (also used as P82) and TO6
(also used as P86).
Timer Flip-Flop (TFF5)
This flip-flop is inverted by the match detect signal
from the comparator and the latch signal to the capture
register CAP2. TFF5 will be inverted when “00” is written
in T4FFCR <TFF5C1, 0>/T6FFCR <TFF6C1, 0>. Also it is
set to “1” when “10” is written, and cleared to “0” when
“10” is written. The value of TFF5 can be output to the
timer output pin TO5 (also used as P82).
Note: This flip-flop (TFF5) is contained only in the 16-bit timer 4.
(1) 16-bit Timer Mode
Timer 4 and 5 operate independently.
Since both timers operate in exactly the same way, timer
4 is used for the purposes of explanation.
Generating interrupts at fixed intervals:
In this example, the interval time is set in the timer register
TREG5 to generate the interrupt INTTR5.
Note:
x; don’t care
–; no change
7
–
1
6
x
1
5
–
0
4
0
0
3
–
1
2
–
0
1
–
0
0
–
0
TRUN
INTET54
←
←
Stop timer 4.
Enable INTTR5 and sets interrupt level 4. Disables
INTTR4.
Disable trigger.
Select internal clock for input and disable the capture function.
T4FFCR
T4MOD
←
←
1
0
1
0
0
1
0
0
0
0
0
1
1
*
1
*
(** = 01, 10, 11)
*
*
*
*
1
–
TREG5
←
*
*
1
*
*
x
*
*
–
*
*
–
*
*
–
*
*
–
Set the interval timer (16 bits).
TRUN
←
Start timer 4.
(2) 16-bit Event Counter Mode
In 16-bit timer mode as described in above, the timer can be
used as an event counter by selecting the external clock (TI4/
TI6 pin input) as the input clock. To read the value of the
counter, first perform “software capture” once and read the
captured value.
The counter counts at the rise edge of TI4/TI6 pin input.
TI4/TI6 pin can also be used as P80/INT4 and P84/INT6.
Since both timers operate in exactly the same way, timer
4 is used for the purposes of explanation.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMP96C141BF | 功能描述:16位微控制器 - MCU ROMLESS TLCS 900 w/ 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| TMP96C141BFG | 功能描述:16位微控制器 - MCU 900 Romless MCU 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| TMP96CM40F | 制造商:Toshiba America Electronic Components 功能描述:TLCS900 M/ROM, 32K ROM , 1K RAM - Tape and Reel |
| TMP96PM40F | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:Quality And Reliability Assurance / Handling Precautions |
| TMP96PM40F(Z) | 功能描述:16位微控制器 - MCU 32K ROM OTP 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
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