參數(shù)資料
型號(hào): TMP96C141AF
廠商: Toshiba Corporation
英文描述: High Speed Advanced CMOS 16-bit Microcontroller For Controlling Medium to Large-Scale Equipment(用于中等到大型設(shè)備控制,高速、先進(jìn)的 CMOS 16位微控制器)
中文描述: 采用先進(jìn)的CMOS高速16位微控制器控制中的大型設(shè)備(用于中等到大型設(shè)備控制,高速,先進(jìn)的的CMOS 16位微控制器)
文件頁(yè)數(shù): 57/178頁(yè)
文件大小: 5667K
代理商: TMP96C141AF
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TOSHIBA CORPORATION
57
TMP96C141AF
Timer register
This is an 8-bit register for setting an interval time.
When the set value of timer registers TREG0, TREG1,
matches the value of up-counter, the comparator
match detect signal becomes active. If the set value is
00H, this signal becomes active when the up-counter
overflows.
Timer register TREG0 is of double buffer structure,
each of which makes a pair with register buffer.
The timer flip-flop control register TFFCR <DBEN> bit
controls whether the double buffer structure in the
Figure 3.7 (3). Configuration of Timer Register 0
Note : Timer register and the register buffer are allocated to the same
memory address. When <DBEN> = 0, the same value is written in
the register buffer as well as the timer register, while when <DBEN>
= 1 only the register buffer is written.
TREG0 should be enabled or disabled. It is disabled
when <DBEN> = 0 and enabled when they are set to
1.
In the condition of double buffer enable state, the data
is transferred from the register buffer to the timer regis-
ter when the 2
-1 overflow occurs in PWM mode, or at
the PPG cycle in PPG mode. Therefore, during timer
mode, the double buffer cannot be used.
When reset, it will be initialized to <DBEN> = 0 to dis-
able the double buffer. To use the double buffer, write
data in the timer register, set <DBEN> to 1, and write
the following data in the register buffer.
n
The memory address of each timer register is as fol-
lows.
TREG0: 000022H
TREG1: 000023H
All registers are write-only and cannot be read.
Comparator
A comparator compares the value in the up-counter
with the values to which the timer register is set. When
they match, the up-counter is cleared to zero and an
interrupt signal (INTT0, INTT1) is generated. If the timer
flip-flop inversion is enabled, the timer flip-flop is
inverted at the same time.
|
Timer flip-flop (timer F/F: TFF1)
The status of the timer flip-flop is inverted by the match
detect signal (comparator output) of each interval timer
and the value can be output to the timer output pins
TO1 (also used as P71).
A timer F/F is provided for a pair of timer 0 and timer 1
and is called TFF1. TFF1 is output to TO1 pin.
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參數(shù)描述
TMP96C141BF 功能描述:16位微控制器 - MCU ROMLESS TLCS 900 w/ 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
TMP96C141BFG 功能描述:16位微控制器 - MCU 900 Romless MCU 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
TMP96CM40F 制造商:Toshiba America Electronic Components 功能描述:TLCS900 M/ROM, 32K ROM , 1K RAM - Tape and Reel
TMP96PM40F 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:Quality And Reliability Assurance / Handling Precautions
TMP96PM40F(Z) 功能描述:16位微控制器 - MCU 32K ROM OTP 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT