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參數(shù)資料
| 型號(hào)： | TDC2302B |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | STS-3/STM-1 Line Interface(STS-3/STM-1線性接口) |
| 中文描述： | STS-3/STM-1線路接口（STS-3/STM-1線性接口） |
| 文件頁數(shù)： | 3/17頁 |
| 文件大小： | 390K |
| 代理商： | TDC2302B |
TDC2302B
STS-3/STM-1 LINE INTERFACE
SDNS002 – SEPTEMBER 1992 – REVISED JUNE 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3
description (continued)
serial data input to byte/nibble output
The serial inputs to the TDC2302B consist of a 155.52-Mbits/s data stream and a corresponding 155.52-MHz
clock signal from an optical-to-electrical converter, clock recovery circuit, or similar function. Both the serial data
and clock inputs operate at differential pseudo-ECL levels. The serial data is clocked into the device on a positive
transition of the clock signal. A serial search for the framing bytes (A1, A2) is performed on the incoming data
in accordance with the selected frame synchronization mode. If the tracking mode is selected (MODE = low),
the device continues to monitor the incoming data stream after the frame has been established, and the LOF,
OOF, and RFE indicators are enabled. If the nontracking mode is selected (MODE = high), the incoming data
is not monitored after the frame has been found, and the LOF, OOF, and RFE indicators are disabled.
If the tracking mode is selected and an out-of-frame condition exists, the TDC2302B initiates a search for the
framing pattern. The framing pattern is defined in ANSI standards and CCITT recommendations to be the six
bytes (F6, F6, F6, 28, 28, 28) for an STS-3/STM-1 signal. These bytes occupy the A1 and A2 byte positions in
the SONET/SDH frame. Once the frame has been found, the serial data is converted to parallel data and output
in either nibble or byte format, depending on the state of the nibble (NIB) input. If NIB is high, the data is output
in nibble format along with a 38.88-MHz clock. If NIB is low, the data is output in byte format along with a
19.44-MHz clock. The device also provides a framing pulse output (RXF) that goes high when the third A2 byte
appears on the data output.
When tracking mode is selected, the RFE, LOF, and OOF indicators are enabled. The RFE output is
synchronous with the third A2 byte and becomes active high when a framing bit error is detected. The signal
is active for one clock cycle when byte format is selected and two clock cycles when nibble format is selected.
If four consecutive frames have framing errors, the OOF output goes high. This output remains high for at least
two frames. If the OOF output remains high for 24 frames, then the LOF output goes high. This output remains
high until eight consecutive error-free frames are received. When an out-of-frame condition occurs (OOF goes
high), the device begins a new search for the framing pattern. The device also begins a new search for the
framing pattern if the OOFN input is taken low for two RXBC clock cycles.
The TDC2302B provides signal scrambling/descrambling and B1 parity checking/generation if the tracking
mode is selected. When the BSCRM input is high, signal scrambling/descrambling and B1 parity
checking/generation are both enabled, and all the bytes after the third C1 byte are scrambled. The B1 parity
errors are indicated with the B1ERR output. A positive output pulse is sent out for each bit of the B1 byte in error.
The pulses are clocked out with the RXBC receive clock, and each pulse is one byte clock period long. There
can be up to eight pulses on the B1ERR lead in a given frame. The ordering of the bit error pulses is from bit 7
to bit 0. For example, if the pulses out of the B1ERR output form the sequence 01000100, then errors are
detected in bit 6 and bit 2 of the B1 byte.
The data and clock outputs of the TDC2302B can be selected to follow either a nibble or byte format when the
tracking mode is enabled. If the nibble mode is selected (NIB is high), the clock output frequency is 38.88 MHz,
and the data byte is output as two nibbles on RXBD3–RXBD0. The most significant nibble is transmitted first,
with the most significant bit of the data byte output on RXBD3. The least significant bit of the data byte is
transmitted on the RXBD0 output of the second nibble. If the byte mode is selected (NIB is low), the clock output
frequency is 19.44 MHz, and the most significant bit is output on RXBD7.
When the nontracking mode is selected, the TDC2302B begins a search for the framing pattern when the OOFN
input is taken low for two RXBC clock periods. The RXBDn output data is set to zero on the rising edge of OOFN.
Valid data is transmitted after the framing pattern has been detected. The RFE, OOF, and LOF alarm indicators
are disabled when the nontracking mode is selected. In addition, the scrambler/descrambler is disabled, and
the data can be output only in byte format.
The serial input data can be looped to the serial data output (facility loopback) independent of whether tracking
mode or nontracking mode is selected. To implement a facility loopback, the facility loopback (FLB) input is taken
high. The received data is passed to the terminal side as well as looped back to the serial output. The terminal
transmit data is blocked by the looped signal and ignored.
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