參數(shù)資料
型號: TAS3202PAGR
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 58/66頁
文件大小: 817K
代理商: TAS3202PAGR
www.ti.com
SLES208B – JUNE 2009 – REVISED MARCH 2011
10 Application Information
10.1 Schematics
Figure 10-1 shows a typical TAS3202 application. In this application, the following conditions apply:
TAS3202 is in clock-master mode. The TAS3202 generates MCLK_OUT1, SCLK_OUT, and
LRCLOK_OUT.
XTAL_IN = 24.576 MHz
I2C register 0x00 contains the default settings, which means:
Audio data word size is 24-bit input and 24-bit output.
Serial data format is 2-channel, I2S for input and output.
I2C data transfer is approximately 400 kbps for both master and slave I2C interfaces.
Sample frequency (fS) is 48 kHz, which means that fLRCLK = 48 kHz and fSCLKIN = 3.072 MHz.
Application code and data are loaded from an external EEPROM using the master I2C interface.
Application commands come from the system microprocessor to the TAS3202 using the slave I2C
interface.
Good design practice requires isolation between the digital and analog power as shown. Power-supply
capacitors of 10
μF and 0.1 μF should be placed near the power supply pins AVDD (AVSS) and DVDD
(DVSS).
The TAS3202 reset needs external glitch protection. Also, RESET going HIGH should be delayed until
TAS3202 internal power is good (~200
μs after power up). This is provided by the 1-k resistor, 1-μF
capacitor, and diode placed near the RESET pin.
It is recommended that a 4.7-
μF capacitor (fast ceramic type) be placed near pin 28 (VR_DIG). This pin
must not be used to source external components.
Copyright 2009–2011, Texas Instruments Incorporated
Application Information
61
Product Folder Link(s): TAS3202
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