參數(shù)資料
型號(hào): ST72361AR9TC
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64
封裝: 10 X 10 MM, ROHS COMPLIANT, PLASTIC, TQFP-64
文件頁數(shù): 66/224頁
文件大?。?/td> 4821K
代理商: ST72361AR9TC
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ST72361-Auto
158/224
LINSCI
SERIAL COMMUNICATION INTERFACE (LIN Master Only) (Cont’d)
10.8.4.4 Conventional Baud Rate Generation
The baud rates for the receiver and transmitter (Rx
and Tx) are set independently and calculated as
follows
:
with:
PR = 1, 3, 4 or 13 (see SCP[1:0] bits)
TR = 1, 2, 4, 8, 16, 32, 64, 128
(see SCT[2:0] bits)
RR = 1, 2, 4, 8, 16, 32, 64, 128
(see SCR[2:0] bits)
All these bits are in the SCIBRR register.
Example: If fCPU is 8 MHz (normal mode) and if
PR = 13 and TR = RR = 1, the transmit and re-
ceive baud rates are 38400 baud.
Note: The baud rate registers MUST NOT be
changed while the transmitter or the receiver is en-
abled.
10.8.4.5 Extended Baud Rate Generation
The extended prescaler option gives a very fine
tuning on the baud rate, using a 255 value prescal-
er, whereas the conventional Baud Rate Genera-
tor retains industry standard software compatibili-
ty.
The extended baud rate generator block diagram
is described in the Figure 90.
The output clock rate sent to the transmitter or to
the receiver is the output from the 16 divider divid-
ed by a factor ranging from 1 to 255 set in the SCI-
ERPR or the SCIETPR register.
Note: The extended prescaler is activated by set-
ting the SCIETPR or SCIERPR register to a value
other than zero. The baud rates are calculated as
follows:
with:
ETPR = 1, ..., 255 (see SCIETPR register)
ERPR = 1, ..., 255 (see SCIERPR register)
10.8.4.6 Receiver Muting and Wake-up Feature
In multiprocessor configurations it is often desira-
ble that only the intended message recipient
should actively receive the full message contents,
thus reducing redundant SCI service overhead for
all non addressed receivers.
The non addressed devices may be placed in
sleep mode by means of the muting function.
Setting the RWU bit by software puts the SCI in
sleep mode:
All the reception status bits cannot be set.
All the receive interrupts are inhibited.
A muted receiver may be awakened by one of the
following two ways:
– by Idle Line detection if the WAKE bit is reset,
– by Address Mark detection if the WAKE bit is set.
Receiver wakes-up by Idle Line detection when
the Receive line has recognized an Idle Frame.
Then the RWU bit is reset by hardware but the
IDLE bit is not set.
Receiver wakes-up by Address Mark detection
when it received a “1” as the most significant bit of
a word, thus indicating that the message is an ad-
dress. The reception of this particular word wakes
up the receiver, resets the RWU bit and sets the
RDRF bit, which allows the receiver to receive this
word normally and to use it as an address word.
Tx =
(16*PR)*TR
fCPU
Rx =
(16*PR)*RR
fCPU
Tx =
16*ETPR*(PR*TR)
fCPU
Rx =
16*ERPR*(PR*RR)
fCPU
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