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參數(shù)資料
| 型號(hào)： | SSTUA32864EG |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Linear Voltage Regulator IC; Package/Case:8-MSOP; Current Rating:250mA; Leaded Process Compatible:No; Output Voltage Max:2.8V; Peak Reflow Compatible (260 C):No; Reel Quantity:2500; Voltage Regulator Type:Low Dropout (LDO) |
| 中文描述： | 1.8伏配置的注冊緩沖的DDR2 - 667 RDIMM特別應(yīng)用 |
| 文件頁數(shù)： | 12/19頁 |
| 文件大?。?/td> | 112K |
| 代理商： | SSTUA32864EG |
9397 750 14757
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 May 2005
12 of 19
Philips Semiconductors
SSTUA32864
1.8 V configurable registered buffer for DDR2-667 RDIMM applications
V
ID
= 600 mV
V
ref
= V
DD
/2
V
IH
= V
ref
+ 250 mV (AC voltage levels) for differential inputs. V
IH
= V
DD
for LVCMOS inputs.
V
IL
= V
ref
250 mV (AC voltage levels) for differential inputs. V
IL
= GND for LVCMOS inputs.
Voltage waveforms; setup and hold times
Fig 9.
t
PLH
and t
PHL
are the same as t
PD
.
Fig 10. Voltage waveforms; propagation delay times (clock to output)
t
PLH
and t
PHL
are the same as t
PD
.
V
IH
= V
ref
+ 250 mV (AC voltage levels) for differential inputs. V
IH
= V
DD
for LVCMOS inputs.
V
IL
= V
ref
250 mV (AC voltage levels) for differential inputs. V
IL
= GND for LVCMOS inputs.
Fig 11. Voltage waveforms; propagation delay times (reset to output)
t
su
V
IH
V
IL
V
ID
t
h
CK
CK
input
V
ref
V
ref
V
ICR
002aaa374
V
OH
V
OL
output
t
PLH
002aaa375
V
TT
V
ICR
V
ICR
t
PHL
CK
CK
V
i(p-p)
t
PHL
002aaa376
LVCMOS
RESET
output
V
TT
V
DD
/2
V
IH
V
IL
V
OH
V
OL
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參數(shù)描述 |
|---|---|
| SSTUA32866 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications |
| SSTUA32866BHLF | 功能描述:IC REGIST BUFFER 25BIT DDR 96BGA RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:- 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| SSTUA32866BHLFT | 功能描述:IC REGIST BUFFER 25BIT DDR 96BGA RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:- 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| SSTUA32866BHMLF | 制造商:Integrated Device Technology Inc 功能描述:REGISTERED BFFR SGL 25-CH CMOS 96TFBGA - Bulk |
| SSTUA32866EC | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications |
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