參數(shù)資料
型號: SST-MELODY-DAP
英文描述: SST-Melody&#174:-DAP: Audio Processor Data Sheet (Rev. 0. 10/02)
文件頁數(shù): 17/24頁
文件大?。?/td> 585K
代理商: SST-MELODY-DAP
REV. 0
SST-Melody-DAP
–17–
Mode D
Mode C
Mode B
Mode A
Booting Method
BDMA feature is used to load the first 32 program memory words from the
byte memory space. Program execution is held off until all 32 words have
been loaded. Chip is configured in Full Memory mode.
*
No automatic boot operations occur. Program execution starts at external
memory location 0. Chip is configured in Full Memory mode. BDMA can
still be used, but the processor does not automatically use or wait for these
operations.
BDMA feature is used to load the first 32 program memory words from the
byte memory space. Program execution is held off until all 32 words have
been loaded. Chip is configured in Host mode;
IACK
has active pull-down
(requires additional hardware).
IDMA feature is used to load any internal memory as desired. Program
execution is held off until internal program memory location 0 is written to.
Chip is configured in Host mode.
IACK
has active pull-down.
*
BDMA feature is used to load the first 32 program memory words from the
byte memory space. Program execution is held off until all 32 words have
been loaded. Chip is configured in Host mode;
IACK
requires external pull-
down (requires additional hardware).
IDMA feature is used to load any internal memory as desired. Program
execution is held off until internal program memory location 0 is written to.
Chip is configured in Host mode.
IACK
requires external pull down.
*
*
Considered standard operating settings. Using these configurations allows for easier design and better memory management.
Table VI. Modes of Operation
X
X
0
0
1
1
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
1
0
1
on crystal type and should be specified by the crystal
manufac-
turer. A parallel-resonant, fundamental frequency,
microprocessor-grade crystal should be used.
A clock output (CLKOUT) signal is generated by the processor
at the processor’s cycle rate. This can be enabled and disabled
by the CLKODIS bit in the SPORT0 Autobuffer Control register.
CLKIN
XTAL
CLKOUT
DSP
Figure 6. External Crystal Connections
RESET
The
RESET
signal initiates a master reset of the SST-Melody-
DAP. The
RESET
signal must be asserted during the power-up
sequence to assure proper initialization.
RESET
during initial power-up must be held long enough to
allow the internal clock to stabilize. If
RESET
is activated any
time after power-up, the clock continues to run and does not
require stabilization time. The power-up sequence is defined as
the total time required for the crystal oscillator circuit to stabi-
lize after a valid VDD is applied to the processor, and for the
internal phase-locked loop (PLL) to lock onto the specific crys-
tal frequency. A minimum of 2000 CLKIN cycles ensures that
the PLL has locked but does not include the crystal oscillator
start-up time. During this power-up sequence, the
RESET
signal should be held low. On any subsequent resets, the
RESET
signal must meet the minimum pulsewidth specification, t
RSP
.
The
RESET
input contains some hysteresis; however, if an RC
circuit is used to generate the
RESET
signal, the use of an external
Schmitt trigger is recommended.
The master reset sets all internal stack pointers to the empty
stack condition, masks all interrupts, and clears the MSTAT
register. When
RESET
is released, if there is no pending bus
request and the chip is configured for booting, the boot-loading
sequence is performed. The first instruction is fetched from
on-chip program memory location 0x0000 once boot loading
completes.
Power Supplies
The SST-Melody-DAP has separate power supply connections for
the
internal (VDDINT) and external (VDDEXT) power sup-
plies.
The internal supply must meet the 2.5 V requirement. The
external supply can be connected to either a 2.5 V or 3.3 V supply.
All
external supply pins must be connected to the same supply. All
input and I/O pins can tolerate input voltages up to 3.6 V, regard-
less of the external supply voltage. This feature provides
maximum flexibility in mixing 2.5 V and 3.3 V components.
MODES OF OPERATION
Setting Memory Mode
Memory Mode selection for the SST-Melody-DAP is made
during
chip reset through the use of the Mode C pin. This pin is
multi
plexed with the DSP’s PF2 pin, so care must be taken in
how the mode selection is made. The two methods for selecting
the value of Mode C are active and passive.
Passive Configuration
Passive configuration involves the use of a pull-up or pull-down
resistor connected to the Mode C pin. To minimize power
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