參數(shù)資料
型號(hào): SI4711-B30-GM
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 20/40頁(yè)
文件大?。?/td> 380K
描述: IC TX FM RADIO 76-108MHZ 20UQFN
標(biāo)準(zhǔn)包裝: 490
頻率: 76MHz ~ 108MHz
應(yīng)用: 通用
調(diào)制或協(xié)議: FM
電流 - 傳輸: 18.8mA
數(shù)據(jù)接口: PCB,表面貼裝
天線連接器: PCB,表面貼裝
電源電壓: 2.7 V ~ 5.5 V
封裝/外殼: 20-UFQFN 裸露焊盤
包裝: 托盤
Si4710/11-B30
20
Rev. 1.1
(LIN/RIN) with programmable attenuation. To ensure
optimal audio performance, the Si4710/11 has a
transmit line input property that allows the user to
specify the peak amplitude of the analog input required
to reach maximum deviation level. The deviation levels
of the audio, pilot, and RDS/RBDS signals can be
independently programmed to customize FM transmitter
designs. The Si4710/11 has a programmable low audio
level and high audio level indicators that allows the user
to selectively enable and disable the carrier based on
the presence of audio content. In addition, the device
provides an overmodulation indicator to allow the user
to dynamically set the maximum deviation level. The
Si4710/11 has a programmable audio dynamic range
control that can be used to reduce the dynamic range of
the audio input signal and increase the volume at the
receiver. These features can dramatically improve the
end users listening experience.
The Si4710/11 is reset by applying a logic low on the
RST pin. This causes all register values to be reset to
their default values. The digital input/output interface
supply (V
IO
) provides voltage to the RST, SEN, SDIO,
RCLK, DIN, DFS, and DCLK pins and can be connected
to the audio baseband processor's supply voltage to
save power and remove the need for voltage level
translators. RCLK is not required for register operation.
The   Si4710/11   reference   clock   is   programmable,
supporting many RCLK inputs as shown in Table 9.
The Si4710/11 are part of a family of broadcast audio
solutions offered in standard, 3 x 3 mm 20-pin QFN
packages. All solutions are layout compatible, allowing
a single PCB to accommodate various feature offerings.
The Si4710/11 includes line inputs to the on-chip
analog-to-digital converters (ADC), a programmable
reference clock input, and a configurable digital audio
interface. The chip supports I
2
C-compliant 2-wire, 8-bit
SPI, and a 3-wire control interface.
5.2. FM Transmitter
The transmitter (TX) integrates a stereo audio ADC to
convert analog audio signals to high fidelity digital
signals. Alternatively, digital audio signals can be
applied to the Si4710/11 directly to reduce power
consumption by eliminating the need to convert audio
baseband signals to analog and back again to digital.
Digital signal processing is used to perform the stereo
MPX encoding and FM modulation to a low digital IF.
Transmit   baseband   filters   suppress   out-of-channel
noise and images from the digital low-IF signal. A
quadrature   single-sideband   mixer   up-converts   the
digital IF signal to RF, and internal RF filters suppress
noise and harmonics to support the harmonic emission
requirements of cellular phones, GPS, WLAN, and other
wireless standards.
The TXO output has over 10 dB of output level control,
programmable in approximately 1 dB steps. This large
output range enables a variety of antennas to be used
for transmit, such as a monopole stub antenna or a loop
antenna. The 1 dB step size provides fine adjustment of
the output voltage.
The TXO output requires only one external 120 nH
inductor. The inductor is used to resonate the antenna
and is automatically calibrated within the integrated
circuit   to   provide   the   optimum   output   level   and
frequency response for supported transmit frequencies.
Users are responsible for adjusting their systems
radiated power levels to comply with local regulations
on RF transmission (FCC, ETSI, ARIB, etc.).
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