參數(shù)資料
型號(hào): SI4711-B30-GM
廠商: Silicon Laboratories Inc
文件頁數(shù): 19/40頁
文件大小: 380K
描述: IC TX FM RADIO 76-108MHZ 20UQFN
標(biāo)準(zhǔn)包裝: 490
頻率: 76MHz ~ 108MHz
應(yīng)用: 通用
調(diào)制或協(xié)議: FM
電流 - 傳輸: 18.8mA
數(shù)據(jù)接口: PCB,表面貼裝
天線連接器: PCB,表面貼裝
電源電壓: 2.7 V ~ 5.5 V
封裝/外殼: 20-UFQFN 裸露焊盤
包裝: 托盤
Si4710/11-B30
Rev. 1.1
19
5. Functional Description
5.1. Overview
Figure 13. Functional Block Diagram
The Si4710/11 is the first 100% CMOS FM radio
transmitter with integrated receive functionality to
measure received signal strength. The device leverages
Silicon Labs highly successful and proven Si4700/01
FM receiver patent family and offers unmatched
integration and performance, allowing FM transmit to be
added to any portable device with a single chip. The
Si4710/11 offers industry-leading size, performance, low
power consumption, flexibility, and ease of use.
The Si4710/11s digital integration reduces the required
external components of traditional offerings, resulting in
a solution requiring only an external inductor and
bypass capacitor, and PCB space of approximately
15 mm
2
. This increases the device reliability and
simplifies the design and manufacturing for companies
adopting this technology.
The Si4710/11 performs FM modulation in the digital
domain to achieve high fidelity, optimal performance
versus power consumption, and flexibility of design. The
onboard DSP provides modulation adjustment and
audio dynamic range control for optimum sound quality.
The Si4711 supports the European Radio Data System
(RDS) and the US Radio Broadcast Data System
(RBDS) including all the symbol encoding, block
synchronization, and error correction functions. Using
this feature, the Si4711 enables data such as artist
name and song title to be transmitted to an RDS/RBDS
receiver.
The transmit output (TXO) connects directly to the
transmit antenna with only one external inductor to
provide harmonic filtering. The output is programmable
over a 10 dB voltage range in 1 dB steps. The TXO
output pin can also be configured for loop antenna
support. Users are responsible for complying with local
regulations on RF transmission (FCC, ETSI, ARIB,
etc.).
The digital audio interface operates in slave mode and
supports a variety of MSB-first audio data formats
including I
2
S and left-justified modes. The interface has
three pins: digital data input (DIN), digital frame
synchronization   input   (DFS),   and   a   digital   bit
synchronization input clock (DCLK). The Si4710/11
supports a number of industry-standard sampling rates
including 32, 40, 44.1, and 48 kHz. The digital audio
interface enables low-power operation by eliminating
the need for redundant DACs and ADCs on the audio
baseband processor.
The Si4710/11 includes a low-noise stereo line input
ADC
ADC
Si4710/11
DSP
DAC
DAC
CONTROL
INTERFACE
GPO
RDS (Si4711)
LDO
VDD
GND
LIN
RIN
Tx
nt
TXO
AFC
L1
120 nH
RFGND
2.75.5 V
C1
22 nF
DFS
DIN
DIGITAL
AUDIO
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