- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄15834 > SI3220PPTX-EVB (Silicon Laboratories Inc)BOARD EVAL W/DISCRETE INTERFACE PDF資料下載
參數(shù)資料
| 型號： | SI3220PPTX-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 61/112頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL W/DISCRETE INTERFACE |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ProSLIC® |
| 主要目的： | 接口，模擬前端（AFE） |
| 已用 IC / 零件： | Si3220 |
| 已供物品： | 板，CD |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁當(dāng)前第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁
Si3220/25 Si3200/02
52
Rev. 1.3
Not
Recommended
fo
r N
ew
D
esi
gn
s
3.12.1. Internal Sinusoidal Ringing
A sinusoidal ringing waveform is generated by the on-
chip digital tone generator. The tone generator used to
generate ringing tones is a two-pole resonator with a
programmable frequency and amplitude. Since ringing
frequencies are low compared to the audio band
signaling frequencies, the sinusoid is generated at a
1 kHz rate. The ringing generator is programmed via the
RINGFREQ, RINGAMP, and RINGPHAS registers. The
equations are as follows:
For example, to generate a 60 Vrms (87 VPK), 20 Hz
ringing signal, the equations are as follows:
In addition to the variable frequency and amplitude, a
selectable dc offset (VOFF), which can be added to the
waveform, is included. The dc offset is defined in the
RINGOF RAM location.
As with the tone generators, the ringing generator has
two timers which function as described above. They
allow on/off cadence settings up to 8 s on/8 s off. In
addition to controlling ringing cadence, these timers
control the transition into and out of the ringing state.
To
initiate
ringing,
the
user
must
program
the
RINGFREQ,
RINGAMP,
and
RINGPHAS
RAM
addresses as well as the RINGTA and RINGTI registers
and select the ringing waveshape and dc offset. After
this is done, TAEN and TIEN bits are set as desired.
The ringing state is invoked by a write to the linefeed
register. At the expiration of RINGTA, the Dual
ProSLIC turns off the ringing waveform and goes to
the on-hook transmission state. At the expiration of
RINGTI,
ringing
is
initiated
again.
This
process
continues as long as the two timers are enabled and the
linefeed register remains in the ringing state.
3.12.2. Internal Trapezoidal Ringing
In
addition
to
the
traditional
sinusoidal
ringing
waveform, the Dual ProSLIC can generate a trapezoidal
ringing waveform similar to the one illustrated in
The
RINGFREQ,
RINGAMP,
and
RINGPHAS RAM addresses are used for programming
the ringing wave shape as follows:
RINGPHAS = 4 x Period x 8000
RINGAMP = (Desired V/160.8 V) x (215)
RINGFREQ = (2 x RINGAMP)/(tRISE x 8000)
RINGFREQ is a value that is added or subtracted from
the waveform to ramp the signal up or down in a linear
fashion. This value is a function of rise time, period, and
amplitude, where rise time and period are related
through the following equation for the crest factor of a
trapezoidal waveform.
where
So, for a 90 VPK, 20 Hz trapezoidal waveform with a
crest factor of 1.3, the period is 0.05 s, and the rise time
requirement is 0.015 s.
RINGPHAS = 4 x 0.05 x 8000 = 1600 (0x0640)
RINGAMP = 90/160.8 x (215) = 18340 (0x47A5)
RINGFREQ = (2 x RINGAMP)/(0.0153 x 8000) = 300
(0x012C)
The time registers and interrupts described in the
sinusoidal ring description also apply to the trapezoidal
ring waveform:
3.13. Internal Unbalanced Ringing
The Si3220 also provides the ability to generate a
traditional battery-backed unbalanced ringing waveform
for ringing terminating devices that require a high dc
content or for use in ground-start systems that cannot
tolerate a ringing waveform on both the TIP and RING
leads. The unbalanced ringing scheme applies the
ringing signal to the RING lead; the TIP lead remains at
the programmed VCM voltage that is very close to
ground. A programmable dc offset can be preset to
provide dc current for ring trip detection. Figure 25
illustrates the internal unbalanced ringing waveform.
coeff
2
f
1000Hz
---------------------
RINGFREQ = coeff
2
23
cos
=
RINGAMP
1
4
--- 1
coeff
–
1coeff
+
------------------------
2
15
DesiredV
PK
160.173V
---------------------------------
=
RINGPHAS
0
=
coeff
2
20
1000Hz
---------------------
0.9921
=
cos
=
RINGFREQ
0.9921
2
23
8322461
0x7EFD9D
==
=
RINGAMP
1
4
---
00789
1.99211
---------------------
2
15
85
160.173
---------------------
273
0x111
=
t
RISE
3
4
---T1
1
CF
2
-----------
–
=
TPeriod
1
f
RING
--------------
CF
desired crest factor
=
==
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCP120-460GI/TO | IC SUPERVISOR ACTIVE LOW TO-92 |
| MCP120-450HI/TO | IC SUPERVISOR ACTIVE LOW TO-92 |
| MAX6439UTFIVD3+T | IC BATTERY MON SNGL SOT23-6 |
| MCP120-450GI/TO | IC SUPERVISOR ACTIVE LOW TO-92 |
| 1838249-1 | CONN MALE M12 3POS R/A 2M CABLE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI3220-X-FQ | 制造商:SILABS 制造商全稱:SILABS 功能描述:DUAL PROSLIC㈢ PROGRAMMABLE CMOS SLIC/CODEC |
| SI3220-X-GQ | 制造商:SILABS 制造商全稱:SILABS 功能描述:DUAL PROSLIC㈢ PROGRAMMABLE CMOS SLIC/CODEC |
| SI3225 | 制造商:SILABS 制造商全稱:SILABS 功能描述:DUAL PROSLIC㈢ PROGRAMMABLE CMOS SLIC/CODEC |
| Si3225-BQ | 功能描述:電信線路管理 IC DUAL CH SLIC CODEC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| SI3225DC0-EVB | 功能描述:子卡和OEM板 Si3225 Daughter Card RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。