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| 型號： | SI3220PPTX-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 111/112頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL W/DISCRETE INTERFACE |
| 標準包裝： | 1 |
| 系列： | ProSLIC® |
| 主要目的： | 接口，模擬前端（AFE） |
| 已用 IC / 零件： | Si3220 |
| 已供物品： | 板，CD |
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Si3220/25 Si3200/02
98
Rev. 1.3
Not
Recommended
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Figure 64. SLIC Diagnostic Filter Structure
3.32.4. Measurement Tools
8-Bit monitor A/D converter. This 8-bit A/D
converter monitors all dc and low-frequency voltage
and current data from TIP to ground and RING to
ground. Two additional values, TIP – RING and
TIP + RING, are calculated and stored in on-chip
registers to analyze metallic and longitudinal effects.
The A/D operates at an 800 Hz update rate to allow
measurement bandwidth from dc to 400 Hz. A dual-
range capability allows high-voltage/high-current
measurement in the high range but can also
measure lower voltages and currents with a tighter
resolution.
Programmable bandpass filter. A bandpass filter
discriminates certain frequency ranges, such as
ringing frequencies and 50 Hz/60 Hz induction, from
nearby or crossed power leads.
SLIC diagnostics filter. Several post-processing
filter blocks monitor peak dc and ac characteristics of
the Monitor A/D converter outputs and values
derived from these outputs. Setting the SDIAG bit in
the DIAG register enables the filters. There are
separate filters for each channel, and their control is
independent. These filters require DSP processing,
which is available only when voice band processing
is not being performed. If an off-hook or ring trip
condition is detected while the SDIAG bit is set, the
bit is cleared, and the diagnostic information is not
processed.
The following parameters can be selected as inputs
to the diagnostic block by setting the SDIAG bits in
the DIAG register to values 0–7 corresponding to the
order below:
VTIP = voltage on the TIP lead
VRI NG = voltage on the RING lead
VLOOP =VTIP-VRING = metallic (loop) voltage
VLONG =(VTIP+VRING)/2 = longitudinal voltage
ILOOP =ITIP-IRING = metallic (loop) current
ILONG =(ITIP+IRING)/2 = longitudinal current
VRING, EXT = ringing voltage when using an external
ringing source (Si3225 only)
IRING,EXT = ringing current when using an external
ringing source (Si3225 only)
The SLIC diagnostic capability consists of a peak detect
block and two filter blocks, one for dc and one for ac.
The topology is illustrated in Figure 64.
The peak detect filter block reports the magnitude of the
largest positive or negative value without sign. The dc
filter block consists of a single pole IIR low-pass filter
with a coefficient held in the DIAGDCCO RAM location.
The filter output is read from the DIAGDC RAM location.
The ac filter block consists of a full-wave rectifier
followed by a single-pole IIR low-pass filter with a
coefficient held in the DIAGACCO RAM location. The
peak value is read from the DIAGPK RAM location. The
peak value is cleared and the filters are flushed on the
0-1 transition of the SDIAG bit and when the input
source changes. The user can write 0 to the DIAGPK
RAM location to get peak information for a specific time
interval.
16-bit audio A/D converter. The A/D converter
portion of the audio codec is made available for
processing test data received back through the
transmit audio path. The audio path offers a 2.5 V
peak voltage measurement capability and a coarse
attenuation stage for scenarios where the incoming
signal amplitude must be attenuated by as much as
3 dB to bring it into the allowable input range without
clipping.
VTIP
VRING
VLOOP
VLONG
ILOOP
ILONG
VRING,EXT
IRING,EXT
LPF
PEAK
DETECT
FULL WAVE
RECTIFY
LPF
DIAGAC
DIAGDC
DIAGPK
DIAGACCO
DIAGDCCO
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