參數(shù)資料
型號(hào)： SI3056SSI-EVB
廠商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 57/94頁(yè)
文件大小： 0K
描述： BOARD EVAL SI3056/SI3018 SSI
標(biāo)準(zhǔn)包裝： 1
主要目的： 電信，數(shù)據(jù)采集裝置（DAA）
已用 IC / 零件： Si3056
已供物品： 板，CD
Si3056
Si3018/19/10
60
Rev. 1.05
Reset settings = 0000_0000
Register 16. International Control 1
Bit
D7D6D5
D4D3D2
D1D0
Name
ACT2
OHS
ACT
IIRE
RZ
RT
Type
RW
R/W
Bit
Name
Function
7
ACT2
AC Termination Select 2 (Si3018 line-side device only).
Works with the ACT bit to select one of four ac terminations:
ACT2
ACT
AC Termination
00
Real, 600
0
1
Global complex impedance
1
0
Global complex impedance, except New Zealand
1
New Zealand complex impedance
The global complex impedance meets minimum return loss requirements in countries that require
a complex ac termination. For improved return loss performance, the other complex impedances
can be used.
6OHS
On-Hook Speed.
This bit, in combination with the OHS2 bit (Register 31) and the SQ[1:0] bits (Register 59), sets the
amount of time for the line-side device to go on-hook. The on-hook speeds specified are measured
from the time the OH bit is cleared until loop current equals zero.
OHS
OHS2
SQ[1:0]
Mean On-Hook Speed
0
00
Less than 0.5 ms
0
1
00
3 ms ±10% (meets ETSI standard)
1
X
11
26 ms ±10% (meets Australia spark quenching spec)
5
ACT
AC Termination Select. (Si3018 line-side device only).
When the ACT2 bit is cleared, the ACT bit selects the following:
0
= Selects the real ac impedance (600 )
1
= Selects the global complex impedance.
4
IIRE
IIR Filter Enable.
0
= FIR filter enabled for transmit and receive filters. See Figures 7–10 on page 16.
1
= IIR filter enabled for transmit and receive filters. See Figures 11–16 on page 17.
3:2
Reserved Read returns zero.
1RZ
Ringer Impedance.
0
= Maximum (high) ringer impedance.
1
= Synthesized ringer impedance enabled. See "5.16.Ringer Impedance and Threshold" on page
0RT
Ringer Threshold Select.
This bit is used to satisfy country requirements on ring detection. Signals below the lower level do
not generate a ring detection; signals above the upper level are guaranteed to generate a ring
detection.
RT
RT Lower level
RT Upper level
013.5 Vrms
16.5 Vrms
1
19.35 Vrms
23.65 Vrms
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI3056-X-FS 制造商:SILABS 制造商全稱:SILABS 功能描述:GLOBAL SERIAL INTERFACE DIRECT ACCESS ARRANGEMENT
SI3060 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE
SI3060-X-FS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE
SI3060-X-FSR 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE
SI3060-X-FT 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE
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