參數(shù)資料
型號(hào)： SI3056SSI-EVB
廠商： Silicon Laboratories Inc
文件頁數(shù)： 46/94頁
文件大小： 0K
描述： BOARD EVAL SI3056/SI3018 SSI
標(biāo)準(zhǔn)包裝： 1
主要目的： 電信，數(shù)據(jù)采集裝置（DAA）
已用 IC / 零件： Si3056
已供物品： 板，CD
Si3056
Si3018/19/10
50
Rev. 1.05
Reset settings = 0000_0011
Register 2. Control 2
Bit
D7D6D5
D4
D3D2D1D0
Name
INTE
INTP
WDTEN
RDI
HBE
RXE
Type
R/W
Bit
Name
Function
7INTE
Interrupt Pin Enable.
0=The AOUT/INT pin functions as an analog output for call progress monitoring purposes.
1=The AOUT/INT pin functions as a hardware interrupt pin.
6INTP
Interrupt Polarity Select.
0=The AOUT/INT pin, when used in hardware interrupt mode, is active low.
1=The AOUT/INT pin, when used in hardware interrupt mode, is active high.
5
Reserved Returns to zero.
4WDTEN
Watchdog Timer Enable.
When set, this bit can only be cleared by a hardware reset. The watchdog timer monitors
register accesses. If no register accesses occur within a 4 second window, the DAA is put into
an on-hook state. A write of a DAA register restarts the watchdog timer counter. If the
watchdog timer times out, the OH and OHE bits are cleared, placing the DAA into an on-hook
state. Setting the OH bit or setting the OHE bit and asserting the OFHK pin places the DAA
back into an off-hook state.
0 = Watchdog timer disabled.
1 = Watchdog timer enabled.
3
Reserved Returns to zero.
2RDI
Ring Detect Interrupt Mode.
This bit operates in conjunction with the RDTM and RDTI bits. This bit is selected if one or two
interrupts are generated for every ring burst.
0 = An interrupt is generated at the beginning of every ring burst.
1 = An interrupt is generated at the beginning and end of every ring burst. The interrupt at the
beginning of the ring burst must be serviced (by writing a 0 to the RDTI bit) before the end of
the ring burst for both interrupts to occur.
1HBE
Hybrid Enable.
0 = Disconnects hybrid in transmit path.
1 = Connects hybrid in transmit path.
0RXE
Receive Enable.
0 = Receive path disabled.
1 = Enables receive path.
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