參數(shù)資料
型號(hào)： SI3012
廠商： Electronic Theatre Controls, Inc.
英文描述： 3.3 V FCC/JATE DIRECT ACCESS ARRANGEMENT
中文描述： 3.3伏催化裂化/ JATE直接訪問安排
文件頁數(shù)： 31/64頁
文件大?。?/td> 1740K
代理商： SI3012
Si3038
Rev. 2.01
31
Figure 27. Si3038 Connection To AC’97 Controller (Primary Device Configuration)
AC-Link Digital Serial Interface Protocol
The Si3024 incorporates a 5-pin digital serial interface
that links it to the AC’97 controller. AC-link is a bi-
directional, fixed rate, serial PCM digital stream. It
handles multiple input and output audio streams
(including modems), as well as control register
accesses employing a TDM scheme. The AC-link
architecture divides each audio frame into 12 outgoing
and 12 incoming data streams, each with 20-bit sample
resolution. The Si3024 data streams are as follows:
Control
—Control register write port; two output slots
Status
—Control register read port; two input slots
Modem Line Codec Output
—Modem line codec
DAC input stream; one output slot per line
Modem Line Codec Input
—Modem line codec ADC
output stream; one input slot per line
I/O Control
—DAA control and GPIO; one output slot
I/O Status
—DAA status and GPIO; one input slot
Synchronization of all AC-link data transactions is
signaled by the AC’97 controller. The Si3024 drives the
serial bit clock onto AC-link, which the AC’97 controller
then qualifies with a synchronization signal to construct
audio frames.
The SYNC signal, fixed at 48 kHz, is derived by dividing
down the serial bit clock (BIT_CLK). BIT_CLK, fixed at
12.288 MHz,
provides
the
granularity to support 12 20-bit outgoing and incoming
time slots. AC-link serial data is transitioned on each
rising edge of BIT_CLK. The receiver of AC-link data,
the Si3024 for outgoing data and the AC’97 controller
for incoming data, samples each serial bit on the falling
edges of BIT_CLK.
necessary
clocking
Figure 28. Standard Bi-Directional Audio Frame
Digital
AC'97
Controller
Si3024
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
RESET
Slot #
SDATA_OUT
SYNC
0
1
2
3
4
5
6
7
8
9
10
11
12
SDATA_IN
Tag
Status
ADDR
Status
DATA
PCM
L
PCM
R
Line 1
ADC
MIC
ADC
RSRVD
Line 2
ADC
HSET
ADC
IO
STATUS
RSRVD
RSRVD
PCM L
(n+1)
PCM R
(n+1)
PCM C
(n+1)
Tag
CMD
ADDR
CMD
DATA
PCM
L
PCM
R
Line 1
DAC
PCM
Center
PCM
L SURR
PCM
R SURR
PCM
LFE
Line 2
DAC
HSET
DAC
IO
CTRL
Codec ID
SLOTREQ 3-12
相關(guān)PDF資料
PDF描述
SI3012-KT 3.3 V FCC/JATE DIRECT ACCESS ARRANGEMENT
SI3035 3.3 V FCC/JATE DIRECT ACCESS ARRANGEMENT
SI3034 DESICCANT CLAY, 30G, PK400; RoHS Compliant: NA
SI3036 Masking Tape; Tape Backing Material:Crepe Paper; Width:24mm; Roll Length:55m; Adhesive Material:Rubber; Color:Natural; Leaded Process Compatible:No; Pack Quantity:1 RoHS Compliant: Yes
SI3038 Duct Tape; Tape Backing Material:PVC; Width:2"; Roll Length:50yard; Color:Gray; Features:Temperature-stable adhesive, Tears easily and evently by hand, leaves no stciky residue when removed RoHS Compliant: Yes
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI-3012KD 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:Surface-Mount, Low Current Consumption, Low Dropout Voltage Linear Regulator ICs
SI-3012KD-TL 制造商:Sanken Electric Co Ltd 功能描述:IC REG LDO ADJ 1A TO-263-5
SI-3012KM 制造商:SANKEN 制造商全稱:Sanken electric 功能描述:Surface Mount Low Current Consumption Low Dropout Voltage Linear Regulator ICs
SI-3012KS 制造商:SANKEN 制造商全稱:Sanken electric 功能描述:Surface-Mount, Low Current Consumption, Low Dropout Voltage
Si3012-KS 功能描述:射頻無線雜項(xiàng) Si3035 FCC/JATE DAA SSI interface RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel
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