參數(shù)資料
型號: SI3012
廠商: Electronic Theatre Controls, Inc.
英文描述: 3.3 V FCC/JATE DIRECT ACCESS ARRANGEMENT
中文描述: 3.3伏催化裂化/ JATE直接訪問安排
文件頁數(shù): 28/64頁
文件大?。?/td> 1740K
代理商: SI3012
Si3038
28
Rev. 2.01
On-Hook Line Monitor
The Si3038 allows the user to receive line activity when in
an on-hook state. The LINE1_CID/LINE2_CID bit in
slot 12 enables a low-power ADC which digitizes the
signal passed across the RNG1/2 pins. This signal is
passed across the ISOcap to the AC’97 controller. A
current of approximately 450
μ
A is drawn from the line
when this bit is activated. This mode is typically used to
detect caller ID data (see the “Caller ID” section).
The on-hook line monitor can also be used to detect
whether a phone line is physically connected to the Si3014
and associated circuitry. If a line is present and the
LINE1_CID/LINE2_CID bit is set, SDATA_IN will have a
near zero value and the LCS[3:0] bits will read 1111b. Due
to the nature of the low-power ADC, the data presented on
SDATA_IN could have up to a 10% dc Offset.
If no line is connected, the output of SDATA_IN will move
towards a negative full scale value (–32768). The value is
guaranteed to be at least 89% of negative full scale. In
addition, the LCS[3:0] bits will be zero.
Caller ID
The Si3038 provides the designer with the ability to
pass caller ID data from the phone line to the AC-link
interface.
In countries where the caller ID data is passed on the
phone line between the first and second rings, the
following method should be utilized to capture the caller
ID data. The RDTP and RDTN register bits should be
monitored to determine the completion of the first ring.
After completion of the first ring, the AC’97 controller
should set the SQLH bit (register 5Ch) for a period of at
least 1 ms. This resets the ac coupling network on the
ring input in preparation for the caller ID data. The
SQLH bit is then cleared, and the LINE1_CID/
LINE2_CID (slot 12, GPIO2/12) should be asserted to
enable the caller ID data to be passed to the AC’97
controller on SDATA_IN. This bit enables a low-power
ADC (approximately 450
μ
A is drawn from the line)
which digitizes the signal passed across the RNG1/2
pins. This signal is passed across the ISOcap to the
AC’97 controller. The LINE1_CID/LINE2_CID bit should
be cleared after the caller ID data is received and prior
to the second ring.
In systems where the caller ID data is preceded by a
line polarity (battery) reversal, the following method
should be used to capture the caller ID data. The
Si3038 supports both full- and half-wave rectified ring
detection. Because a polarity reversal will trip either the
RDTP or RDTN ring detection bits, the user must
distinguish between a polarity reversal and a ring. This
is accomplished using the full-wave ring detector in the
device. The lowest specified ring frequency is 15 Hz;
therefore, if a battery reversal occurs, the AC’97
controller should wait a minimum of 40 ms to verify that
the event observed is a battery reversal and not a ring
signal. This time is greater than half the period of the
longest ring signal. If another edge is detected during
this 40 ms pause, this event is characterized as a ring
signal and not a battery reversal. If it is a battery
reversal, the AC’97 controller should set the SQLH bit
for a period of at least 1 ms. This resets the ac coupling
network on the ring input in preparation for the caller ID
data. The SQLH bit is then cleared, and the LINE1_CID/
LINE2_CID should be asserted to enable the caller ID
data to be passed to the AC’97 controller and presented
on SDATA_IN. The bit should be cleared after the AC’97
controller has received the caller ID data.
Due to the nature of the low-power ADC, the data
presented on SDATA_IN will have up to a 10% dc
Offset. The caller ID decoder must either use a high
pass or band pass filter to accurately retrieve the caller
ID data.
Loop Current Monitor
It may be desirable to have a measurement of the loop
current being drawn from the line. This measurements
can be used to tell whether a telephone line is
connected, whether a parallel handset has been picked
up, or if excessive loop current is present.
When the system is in an off-hook state, the LCS bits of
register 5Eh indicate the approximate amount of dc loop
current. The LCS is a 4-bit value ranging from zero to
fifteen. Each unit represents approximately 6 mA of loop
current from LCS codes 1–14. The typical LCS transfer
function is shown in Figure 26:
Figure 26. Typical LCS Transfer Function
An LCS value of zero means the loop current is less
than required for normal operation and the system
should be on-hook. Typically, an LCS value of 15 means
the loop current is greater than 155 mA.
The LCS detector has a built-in hysteresis of 2 mA. This
allows for a stable LCS value when the loop current is
0
5
10
15
LCS
BIT
0
6 12 18 24 30 36 42 48 54 60 66 72
155
78 84 90 96
Loop Current (mA)
相關(guān)PDF資料
PDF描述
SI3012-KT 3.3 V FCC/JATE DIRECT ACCESS ARRANGEMENT
SI3035 3.3 V FCC/JATE DIRECT ACCESS ARRANGEMENT
SI3034 DESICCANT CLAY, 30G, PK400; RoHS Compliant: NA
SI3036 Masking Tape; Tape Backing Material:Crepe Paper; Width:24mm; Roll Length:55m; Adhesive Material:Rubber; Color:Natural; Leaded Process Compatible:No; Pack Quantity:1 RoHS Compliant: Yes
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