參數(shù)資料
型號： SDA9400
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
英文描述： Scan Rate Converter using Embedded DRAM Technology Units
中文描述： 掃描頻率轉(zhuǎn)換器采用嵌入式DRAM技術(shù)股
文件頁數(shù)： 18/94頁
文件大?。?/td> 1180K
代理商： SDA9400
SDA 9400
Micronas
18
Preliminary Data Sheet
6.3
Low data rate processing
The next figure shows the block diagram of the low data rate processing block. The input signal can
be vertically and horizontally compressed by a limited number of factors. In case of multipicture
mode the internal Multipicture controller will use both compression blocks to control the different
modes. Furthermore the input signal can be processed by different noise reduction algorithms to
reduce the noise in the signal. A motion detector calculates motion values for a motion adaptive
scan rate conversion processing. The movie mode and phase detector determines the information,
whether the input signal is a camera scene or movie scene. The global motion detector derives a
one bit signal, which indicates that the input signal is a still picture or a moving picture. The noise
measurement block determines the noise level of the input signal.
Block diagram of low data rate processing
The different blocks and the corresponding parameters will be described now in more detail.
6.3.1
Vertical compression
The vertical compression compresses the incoming signal vertically by a constant factor given by
the parameter VDECON. For the Y and UV signal different filter characteristics are used. The
vertical compression can be switched off. For the multipicture modes the factors VDECON 2, 3 and
4 are necessary. Different filter characteristics are used for the factors 3 and 4. High quality vertical
compression for double window applications is possible, because the filter characteristic is
optimized for the factor 1.5.
The table below shows the relation between the parameter VDECON and the compression factor.
Input write parameter: VDECON
VDECON (1Ch)
0
1
2
3
4
5
6
7
Vertical compression off
Factor 1.25
Factor 1.5
Factor 1.75
Factor 2.0
Factor 3.0
Factor 4.0
not defined
Line
memories
YIN
UVIN
Y to Memory
UV to Memory
b
Vertical
compression
Horizontal
compression
Multipicture
controller
Spatial noise
reduction
Temporal
noise
reduction
Noise
measurement
Motion
detector for
scan rate
conversion
Global
motion and
movie mode
and phase
detection
Y from Memory
UV from Memory
MULTIPIC, PICPOS, YBORDER,
UBORDER, VBORDER
NMLINE, NMALG
NOISEME
VDECON,
VCSNRON
HDECON,
HCSNRON
SNRON
NRON
GMOTION, MOVMO, MOVPH
Motion value to Memory
相關(guān)PDF資料
PDF描述
SDA9410-B13 Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
SDA9415-B13 Display Processor and Scan Rate Converter
SDA9488X Cost-effective Picture-In-Picture ICs
SDA9588X Cost-effective Picture-In-Picture ICs
SDA9489X PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SDA9401 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Scan Rate Converter using Embedded DRAM Technology Units
SDA9410-B13 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
SDA9415-B13 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Display Processor and Scan Rate Converter
SDA9488X 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Cost-effective Picture-In-Picture ICs
SDA9489X 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs
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