參數(shù)資料
型號(hào): SC16C752BIB48
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 5 V, 2.2 V and 2.5 V dual UART, 5 Mbit-s (max.), with 64-byte FIFOs
封裝: SC16C752BIB48<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html<1<Always Pb-free,;SC16C752BIB48<SOT313-2 (LQFP48)|<<http://www.nxp.com/packages/SOT313-2.html&
文件頁數(shù): 19/47頁
文件大?。?/td> 945K
代理商: SC16C752BIB48
SC16C752B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 6 — 30 November 2010
19 of 47
NXP Semiconductors
SC16C752B
5 V, 2.2 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
7. Register descriptions
Each register is selected using address lines A0, A1, A2, and in some cases, bits from
other registers. The programming combinations for register selection are shown in
Table 9
.
Table 9.
A2
0
0
[1]
MCR[7] can only be modified when EFR[4] is set.
[2]
Accessed by a combination of address pins and register bits.
[3]
Accessible only when LCR[7] is logic 1.
[4]
Accessible only when LCR is set to 1011 1111 (BFh).
[5]
Accessible only when EFR[4] = logic 1 and MCR[6] = logic 1, i.e., EFR[4] and MCR[6] are read/write
enables.
[6]
Accessible only when CSA or CSB = logic 0, MCR[2] = logic 1, and loopback is disabled
(MCR[4] = logic 0).
Fig 13. Crystal oscillator connections
002aaa870
C2
47 pF
XTAL1
XTAL2
X1
1.8432 MHz
C1
22 pF
C2
33 pF
XTAL1
XTAL2
1.5 k
Ω
X1
1.8432 MHz
C1
22 pF
Register map - read/write properties
A0
Read mode
0
Receive Holding Register (RHR)
1
Interrupt Enable Register (IER)
A1
0
0
Write mode
Transmit Holding Register (THR)
Interrupt Enable Register
0
0
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
0
0
1
1
1
1
1
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
1
Interrupt Identification Register (IIR)
Line Control Register (LCR)
Modem Control Register (MCR)
[1]
Line Status Register (LSR)
Modem Status Register (MSR)
Scratchpad Register (SPR)
Divisor Latch LSB (DLL)
[2][3]
Divisor Latch MSB (DLM)
[2][3]
Enhanced Feature Register (EFR)
[2][4]
Xon1 word
[2][4]
Xon2 word
[2][4]
Xoff1 word
[2][4]
Xoff2 word
[2][4]
Transmission Control Register (TCR)
[2][5]
Trigger Level Register (TLR)
[2][5]
FIFO ready register
[2][6]
FIFO Control Register (FCR)
Line Control Register
Modem Control Register
[1]
Scratchpad Register
Divisor Latch LSB
[2][3]
Divisor Latch MSB
[2][3]
Enhanced Feature Register
[2][4]
Xon1 word
[2][4]
Xon2 word
[2][4]
Xoff1 word
[2][4]
Xoff2 word
[2][4]
Transmission Control Register
[2][5]
Trigger Level Register
[2][5]
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