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| 型號： | SAH-XC2712X-8F66R |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PDSO38 |
| 封裝： | 0.50 MM PITCH, GREEN, PLASTIC, TSSOP-38 |
| 文件頁數(shù)： | 21/103頁 |
| 文件大?。?/td> | 2957K |
| 代理商： | SAH-XC2712X-8F66R |
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XC2712X
XC2000 Family / Compact Line
Functional Description
PRELIMINARY
Data Sheet
20
V1.0, 2010-12
3
Functional Description
The architecture of the XC2712X combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a well-balanced design. On-chip
memory blocks allow the design of compact systems-on-silicon with maximum
performance suited for computing, control, and communication.
The on-chip memory blocks (program code memory and SRAM, dual-port RAM, data
SRAM) and the generic peripherals are connected to the CPU by separate high-speed
buses. Another bus, the LXBus, connects additional on-chip resources and external
resources (see Figure 3). This bus structure enhances overall system performance by
enabling the concurrent operation of several subsystems of the XC2712X.
The block diagram gives an overview of the on-chip components and the advanced
internal bus structure of the XC2712X.
Figure 3
Block Diagram
DPRAM
CPU
PM
U
DMU
ADC0
Module
8-/10- /
12 -Bit
RTC
MCHK
Interrupt & PEC
LXBUS
Controller
DSRAM
System Functions
Clock, Reset, Power
Control
OCDS
Debug Support
Interrupt Bus
Per
iph
er
a
lD
at
a
Bu
s
Analog and Digital General Purpose IO (GPIO) Ports
MC_U-SERIES_BLOCKDIAGRAM
GPT
5
Timers
CC2
Module
16
Chan.
LXB
us
WWD
CCU6 0
Module
3+1
Chan.
USIC0
Module
2
Chan.
PSRAM
Flash Memory
IM
B
MAC Unit
MPU
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