參數(shù)資料
型號: SAF82526N
廠商: INFINEON TECHNOLOGIES AG
英文描述: Data Communications ICs
中文描述: 數(shù)據(jù)通信集成電路
文件頁數(shù): 53/126頁
文件大?。?/td> 730K
代理商: SAF82526N
Semiconductor Group
53
SAB 82525
SAB 82526
SAF 82525
SAF 82526
This must be considered for applications, where several transmitters are sharing the same
time-slot on a
non
open-drain bus, e.g. a balanced bus, not using collision detection as the
resolution mechanism. One such application is slave stations in a point-to-multipoint
configuration sharing the same time-slot and using NRM auto-mode. Thus, RTS and the time-
slot marker TxCLK cannot simply be gated to generate a driver control signal. Instead the
following recommendations apply:
a) Do not use the RTS signal directly in clock mode 5 e.g. to enable drivers for TxD in a
balanced bus configuration. Instead, use an arrangement of the type shown in the
figure 25
or
Figure 25
ITD05980
HSCX
TxD
D
V
DD
SS
V
Transmission Line
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