參數(shù)資料
型號(hào): SAF82526N
廠商: INFINEON TECHNOLOGIES AG
英文描述: Data Communications ICs
中文描述: 數(shù)據(jù)通信集成電路
文件頁數(shù): 119/126頁
文件大?。?/td> 730K
代理商: SAF82526N
Semiconductor Group
119
SAB 82525
SAB 82526
SAF 82525
SAF 82526
Upgrades of HSCX Version A3
The HSCX Version A3 is fully upward compatible to Version A2. The differences with respect
to HSCX Technical Manual Rev. 2.89 are shown in
table 12
.
Table 12
Differences HSCX A2 – HSCX A3
Differences
t
RI,
t
WI
t
AA
t
LA
t
DRH
t
RD
t
RDS
t
RDH
t
XDD
t
CDS
t
AH
t
DW
Ver. A2
70 ns
50 ns
20 ns
85 ns
120 ns
5 ns
30 ns
70 ns
0 ns
20 ns
30 ns
Ver. A3
60 ns
25 ns
10 ns
80 ns
100 ns; SAF110 ns
20 ns
5 ns
68 ns
5 ns
10 ns
10 ns
User Manual Chapter
9
9
9
9
9
9
9
9
9
9
9
IOL value, pin T
×
D
VSTR value
2 mA
02H
9
8
7 mA
04H
The following additional features are implemented in HSCX A3.
Transmission in back to back frames.
Two or more frames may be transmitted continously without interframe time fill
T
×
D, R
×
D flip
In clock modes 0, 1, 4 and 5 pins R
×
D and T
×
D may be flipped
(refer to CCR2 Register SOC0 and SOC1 bit)
Status Register
In auto-mode, START: bit 0 indicates the ’Waiting for Acknowledgement’ status
Appendix A
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