參數(shù)資料
型號: SAF82526N
廠商: INFINEON TECHNOLOGIES AG
英文描述: Data Communications ICs
中文描述: 數(shù)據(jù)通信集成電路
文件頁數(shù): 15/126頁
文件大?。?/td> 730K
代理商: SAF82526N
Semiconductor Group
15
82525
82526
82525
82526
SAB
SAB
SAF
SAF
Pin Definitions and Functions
(cont’d)
Pin No.
Symbol
Input (
I)
Output (O)
Function
40
38
DRQTA
DRQTB
O
DMA Request Transmitter
(channel A/channel B)
The transmitter of the HSCX requests a DMA data transfer
by activating this line.
The DRQTn remains high as long as the transmit FIFO
requires data transfers.
The amount of data bytes to be transferred from system
memory to the HSCX (= byte count) must be written first to
the XBCH, XBCL registers.
Always blocks of data (n x 32 bytes + REST, n = 0, 1,…)
are transferred till the byte count is reached.
DRQTn is deactivated immediately following the falling
edge of the last WR cycle.
41
V
DD
I
Power supply + 5 V.
1
43
2
P-LCC P-MQFP
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