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參數(shù)資料
| 型號： | SAF7113 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 9-bit video input processor |
| 中文描述： | 9位視頻輸入處理器 |
| 文件頁數(shù)： | 34/80頁 |
| 文件大小： | 281K |
| 代理商： | SAF7113 |
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2000 May 08
34
Philips Semiconductors
Product specification
9-bit video input processor
SAF7113H
8.11
RTCO output
The real-time control and status output signal contains
serial information about the actual system clock
(increment of the HPLL), subcarrier frequency, increment
and phase (via reset) of the FSC-PLL and PAL sequence
bit. The signal can be used for various applications in
external circuits, e.g. in a digital encoder to achieve clean
encoding. The SAF7113H supports RTC level 3.1 (see
externaldocument“RTCFunctionalDescription”available
on request).
8.12
RTS0, RTS1 terminals
These two pins are multi functional inputs/output
controlled by I
2
C-bus bits RTSE03 to RTSE00 and
RTSE13 to RTSE10, located in subaddress 12H;
see Tables 49 and 50.
The RTS0 terminal can be strapped to ground via a 3.3 k
resistor to change the I
2
C-bus slave address from default
4AH/4BH to 48H/49H (the strapping information is read
only during the reset sequence).
The RTS1 terminal can be configured as Data Output to
3-state (DOT) input by RTSE13 to RTSE10 = 0000 to
control the VPO port (bits 7 to 0) via hardware according
to Table 19.
Table 19
Digital output control via RTS1 (enabled by bits
RTSE13 to RTSE10 = 0)
9
BOUNDARY SCAN TEST
The SAF7113H has built in logic and 5 dedicated pins to
support boundary scan testing which allows board testing
without special hardware (nails). The SAF7113H follows
the “IEEE Std. 1149.1 - Standard Test Access Port and
Boundary-Scan Architecture”set by the Joint Test Action
Group (JTAG) chaired by Philips.
The 5 special pins are Test Mode Select (TMS), Test
Clock (TCK), Test Reset (TRST), Test Data Input (TDI)
and Test Data Output (TDO).
The BST functions BYPASS, EXTEST, INTEST,
SAMPLE, CLAMP and IDCODE are all supported
(see Table 20). Details about the JTAG BST-TEST can be
found in the specification “IEEE Std. 1149.1” A file
containing the detailed Boundary Scan Description
Language (BSDL) description of the SAF7113H is
available on request.
OEYC
DOT
(RTS1)
VPO7 TO VPO0
0
1
0
1
0
0
1
1
Z
active
Z
Z
Table 20
BST instructions supported by the SAF7113H
INSTRUCTION
DESCRIPTION
BYPASS
This mandatory instruction provides a minimum length serial path (1 bit) between TDI and TDO
when no test operation of the component is required.
This mandatory instruction allows testing of off-chip circuitry and board level interconnections.
This mandatory instruction can be used to take a sample of the inputs during normal operation of
the component. It can also be used to preload data values into the latched outputs of the
boundary scan register.
This optional instruction is useful for testing when not all ICs have BST. This instruction addresses
the bypass register while the boundary scan register is in external test mode.
This optional instruction will provide information on the components manufacturer, part number and
version number.
This optional instruction allows testing of the internal logic (no support for customers available).
This private instruction allows testing by the manufacturer (no support for customers available).
EXTEST
SAMPLE
CLAMP
IDCODE
INTEST
USER1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAF7113H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:9-bit video input processor |
| SAF7113H/V1,518 | 功能描述:視頻 IC VIDEO INPUT PROCESSR RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAF7113H/V1,557 | 功能描述:視頻 IC 9-BIT VIDEO INPUT PROCESSOR RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| SAF7115 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multistandard video decoder with super-adaptive comb filter, |
| SAF7115ET | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multistandard video decoder with super-adaptive comb filter, |
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