參數(shù)資料
型號: SAF-XC2264N-16F40L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-100
文件頁數(shù): 67/131頁
文件大小: 1627K
代理商: SAF-XC2264N-16F40L
XC2261N/68N, XC2263N/64N/65N
XC2000 Family / Value Line
Functional Description
Data Sheet
40
V1.4, 2011-07
3
Functional Description
The architecture of the XC226xN combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a well-balanced design. On-chip
memory blocks allow the design of compact systems-on-silicon with maximum
performance suited for computing, control, and communication.
The on-chip memory blocks (program code memory and SRAM, dual-port RAM, data
SRAM) and the generic peripherals are connected to the CPU by separate high-speed
buses. Another bus, the LXBus, connects additional on-chip resources and external
resources. This bus structure enhances overall system performance by enabling the
concurrent operation of several subsystems of the XC226xN.
The block diagram gives an overview of the on-chip components and the advanced
internal bus structure of the XC226xN.
Figure 4
Block Diagram
DPRAM
CPU
PMU
DM
U
ADC0
Module
8-/10-
Bit
RTC
MCHK
Interrupt & PEC
EBC
LXBus Control
External Bus
Control
DSRAM
System Functions
Clock, Reset, Power
Control, StandBy RAM
OCDS
Debug Support
Interrupt Bus
Perip
her
al
D
ata
Bus
Analog and Digital General Purpose IO (GPIO) Ports
MC_N-SERIES_BLOCKDIAGRAM
GPT
5
Timers
CC2
Module
16
Chan.
LX
Bus
WDT
Multi
CAN
CCU6x
Modules
3+1
Chan.
each
USICx
Modules
2
Chan.
each
PSRAM
Flash Memory
IM
B
MAC Unit
MPU
ADC1
Module
8-/10-
Bit
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