參數(shù)資料
型號: SAF-XC2264N-16F40L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-100
文件頁數(shù): 63/131頁
文件大小: 1627K
代理商: SAF-XC2264N-16F40L
XC2261N/68N, XC2263N/64N/65N
XC2000 Family / Value Line
General Device Information
Data Sheet
37
V1.4, 2011-07
97
PORST
IIn/B
Power On Reset Input
A low level at this pin resets the XC226xN
completely. A spike filter suppresses input pulses
<10 ns. Input pulses >100 ns safely pass the filter.
The minimum duration for a safe recognition
should be 120 ns.
An internal pull-up device will hold this pin high
when nothing is driving it.
98
ESR1
O0 / I St/B
External Service Request 1
After power-up, an internal weak pull-up device
holds this pin high when nothing is driving it.
RxDC0E
I
St/B
CAN Node 0 Receive Data Input
U1C0_DX0F
I
St/B
USIC1 Channel 0 Shift Data Input
U1C0_DX2C
I
St/B
USIC1 Channel 0 Shift Control Input
U1C1_DX0C
I
St/B
USIC1 Channel 1 Shift Data Input
U1C1_DX2B
I
St/B
USIC1 Channel 1 Shift Control Input
U2C1_DX2C
I
St/B
USIC2 Channel 1 Shift Control Input
99
ESR0
O0 / I St/B
External Service Request 0
After power-up, ESR0 operates as open-drain
bidirectional reset with a weak pull-up.
U1C0_DX0E
I
St/B
USIC1 Channel 0 Shift Data Input
U1C0_DX2B
I
St/B
USIC1 Channel 0 Shift Control Input
10
V
DDIM
-
PS/M Digital Core Supply Voltage for Domain M
Decouple with a ceramic capacitor, see Data
Sheet for details.
38,
64,
88
V
DDI1
-
PS/1
Digital Core Supply Voltage for Domain 1
Decouple with a ceramic capacitor, see Data
Sheet for details.
All
V
DDI1 pins must be connected to each other.
14
V
DDPA
-
PS/A Digital Pad Supply Voltage for Domain A
Connect decoupling capacitors to adjacent
V
DDP/VSS pin pairs as close as possible to the pins.
Note: The A/D_Converters and ports P5, P6 and
P15 are fed from supply voltage
V
DDPA.
Table 6
Pin Definitions and Functions (cont’d)
Pin
Symbol
Ctrl.
Type Function
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