參數(shù)資料
型號： SAF-XC2264N-16F40L
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-100
文件頁數(shù)： 40/131頁
文件大?。?/td> 1627K
代理商： SAF-XC2264N-16F40L
XC2261N/68N, XC2263N/64N/65N
XC2000 Family / Value Line
General Device Information
Data Sheet
16
V1.4, 2011-07
Key to Pin Definitions
Ctrl.: The output signal for a port pin is selected by bit field PC in the associated
register Px_IOCRy. Output O0 is selected by setting the respective bit field PC to
1x00
B, output O1 is selected by 1x01B, etc.
Output signal OH is controlled by hardware.
Type: Indicates the pad type and its power supply domain (A, B, M, 1).
– St: Standard pad
– Sp: Special pad e.g. XTALx
– DP: Double pad - can be used as standard or high speed pad
– In: Input only pad
– PS: Power supply pad
Table 6
Pin Definitions and Functions
Pin
Symbol
Ctrl.
Type Function
3
TESTM
IIn/B
Testmode Enable
Enables factory test modes, must be held HIGH for
normal operation (connect to
V
DDPB).
An internal pull-up device will hold this pin high
when nothing is driving it.
4
P7.2
O0 / I St/B
Bit 2 of Port 7, General Purpose Input/Output
EMUX0
O1
St/B
External Analog MUX Control Output 0 (ADC1)
TxDC4
O2
St/B
CAN Node 4 Transmit Data Output
TxDC5
O3
St/B
CAN Node 5 Transmit Data Output
TDI_C
IH
St/B
JTAG Test Data Input
If JTAG pos. C is selected during start-up, an
internal pull-up device will hold this pin high when
nothing is driving it.
5TRST
IIn/B
Test-System Reset Input
For normal system operation, pin TRST should be
held low. A high level at this pin at the rising edge
of PORST activates the XC226xN’s debug
system. In this case, pin TRST must be driven low
once to reset the debug system.
An internal pull-down device will hold this pin low
when nothing is driving it.
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