參數(shù)資料
型號： SAF-XC2264N-16F40L
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-100
文件頁數(shù)： 64/131頁
文件大?。?/td> 1627K
代理商： SAF-XC2264N-16F40L
XC2261N/68N, XC2263N/64N/65N
XC2000 Family / Value Line
General Device Information
Data Sheet
38
V1.4, 2011-07
2,
25,
27,
50,
52,
75,
77,
100
V
DDPB
-
PS/B Digital Pad Supply Voltage for Domain B
Connect decoupling capacitors to adjacent
V
DDP/VSS pin pairs as close as possible to the pins.
Note: The on-chip voltage regulators and all ports
except P5, P6 and P15 are fed from supply
voltage
V
DDPB.
1,
26,
51,
76
V
SS
-
PS/-- Digital Ground
All
V
SS pins must be connected to the ground-line
or ground-plane.
Note: Also
the
exposed
pad
is
connected
internally to
V
SS.
To improve the EMC
behavior, it is recommended to connect the
exposed pad to the board ground.
For thermal aspects, please refer to the
Data Sheet. Board layout examples are
given in an application note.
1) To generate the reference clock output for bus timing measurement,
f
SYS must be selected as source for
EXTCLK and P2.8 must be selected as output pin. Also the high-speed clock pad must be enabled. This
configuration is referred to as reference clock output signal CLKOUT.
Table 6
Pin Definitions and Functions (cont’d)
Pin
Symbol
Ctrl.
Type Function
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