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| 型號： | SAA7160ET |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | PCI/cPCI/PXI |
| 英文描述： | PCI Express based audio and video bridge |
| 封裝： | SAA7160E/V2/R5<SOT879-1 (LBGA196)|<<http://www.nxp.com/packages/SOT879-1.html<1<Always Pb-free,;SAA7160ET/V2/R5<SOT951-1 (TFBGA88)|<<http://www.nxp.com/packages/SOT951-1. |
| 文件頁數(shù)： | 34/57頁 |
| 文件大小： | 236K |
| 代理商： | SAA7160ET |
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SAA7160_1
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 25 February 2008
34 of 57
NXP Semiconductors
SAA7160
PCI Express based audio and video bridge
6.1.1
DMA byte alignment
The DMA byte alignment module implements the byte address alignment for each of the
DMA channels coming from the AV input modules. The module addresses alignment with
byte granularity in an entire 4 kB page.
The main features are:
Byte address alignment for DTL-MMSD streams
–
Address alignment within 4 kB page (0 B to 4095 B)
Support for multiple buffering
–
Maximum 8 memory buffers (8 address offset registers per DMA channel)
Support for 12 DMA channels
–
2
×
3 VIP (data width is 64 bit)
–
4
×
1 FGPI
–
2
×
1 AI
Based on the current buffer number the module selects the correct address offset register.
It implements 8 address offset registers per DMA channel to support multiple buffering.
The memory buffer handling supports up to 8 buffers per DMA channel. The (byte)
address alignment for the different buffers is the same, and hence the module implements
8 address offset registers per DMA channel such that each buffer can have a different
address alignment.
6.2 Message signal interrupt
The MSI logic is responsible for generating the MSI messages. MSI is a native feature in
PCI Express that enables a device to request a service by writing an interrupt event. The
write transaction address specifies the MSI message destination and the write transaction
data specifies the message including a message ID.
The main features of the MSI logic are:
MSI capability
–
32 different messages
–
Programmable ID in MSI message data field
–
Programmable MSI message address field
Programmable MSI delay timer
Support for the following interrupt sources:
–
DMA channel acknowledge interrupts (12
×
)
–
DMA channel overflow interrupts (12
×
)
–
AV interrupts (8
×
)
–
I
2
C-bus interrupts (2
×
)
–
External interrupts from GPIO (16
×
)
–
All interrupts edge sensitive with programmable edge polarity
Support for interrupt masking (i.e. enable/disable)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7160ET/V2 | 制造商:NXP Semiconductors 功能描述:SAA7160ET/TFBGA88/TRAYDPM//V2 - Trays |
| SAA7160ET/V2,557 | 制造商:Sigma Designs 功能描述:PCI Express based audio and video bridge 88-Pin TFBGA |
| SAA7162E | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:PCI Express based dual channel multistandard audio and video decoder |
| SAA7164 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| SAA7165 | 制造商:NXP Semiconductors 功能描述: |
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