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參數(shù)資料
| 型號： | SAA7160ET |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | PCI/cPCI/PXI |
| 英文描述： | PCI Express based audio and video bridge |
| 封裝： | SAA7160E/V2/R5<SOT879-1 (LBGA196)|<<http://www.nxp.com/packages/SOT879-1.html<1<Always Pb-free,;SAA7160ET/V2/R5<SOT951-1 (TFBGA88)|<<http://www.nxp.com/packages/SOT951-1. |
| 文件頁數(shù)： | 30/57頁 |
| 文件大?。?/td> | 236K |
| 代理商： | SAA7160ET |
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SAA7160_1
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 25 February 2008
30 of 57
NXP Semiconductors
SAA7160
PCI Express based audio and video bridge
[1]
The pin types are defined in
Table 3
.
BOOT_0
N13
IOU
GPIO: programming control port signal for
general purpose input/output port 30
boot mode GPIO_[31:30] bit 0
GPIO: programming control port signal for
general purpose input/output port 31
boot mode GPIO_[31:30] bit 1
PCI Express differential receive data input 0 (positive)
PCI Express differential receive data input 0 (negative)
PCI Express differential transmit data output 0 (positive)
PCI Express differential transmit data output 0 (negative)
PCI Express clock 100 MHz differential input (positive)
PCI Express clock 100 MHz differential input (negative)
this signal is used to create a compensation signal internally which will adjust the IO
pads’ characteristics as PVT drifts; connect 33
resistor to V
DDD(PCI)(1V25)
system reset (active LOW)
JTAG test reset input: drive HIGH for normal operation
JTAG test clock input
JTAG test mode select
JTAG test serial data output
JTAG test serial data input
SPI clock
SPI; transfer serial data from master to slave (slave data input or master data output)
SPI; transfer serial data from slave to master (master data input or slave data output)
enable test mode 1; must be connected to V
SS
I
2
C-bus clock of second I
2
C-bus interface (interface can be used for boot EEPROM)
I
2
C-bus data of second I
2
C-bus interface (interface can be used for boot EEPROM)
I
2
S-bus port B: digital audio input signal for
I2S_SD serial data line of Inter IC Sound bus serial interconnect format
I
2
S-bus port B: digital audio input signal for
I2S_SD serial data line of Inter IC Sound bus serial interconnect format
I
2
S-bus port B: digital audio input signal for
I2S_WS word select line of Inter IC Sound bus serial interconnect format
I
2
S-bus port B: digital audio input signal for
I2S_SCK bit clock of Inter IC Sound bus serial interconnect format
BOOT_1
M11
IOU
PCI_PER_P0
PCI_PER_N0
PCI_PET_P0
PCI_PET_N0
PCI_REFCLKP
PCI_REFCLKN
PCI_PVT
N1
N2
N4
N5
N7
N8
M5
AI
AI
AO
AO
AI
AI
AI
PCI_RESN
TRSTN
TCK
TMS
TDO
TDI
SPI_CLK
SPI_MA_SL
SPI_SL_MA
TEST1
SCL_B
SDA_B
I2S_SD0_B
M6
M8
M9
M12
M10
N9
N10
N11
N12
F12
K2
M1
K1
ID
IU
IU
IU
O
IU
IU
IOU
IOU
ID
IO
IO
IO
I2S_SD1_B
G2
IO
I2S_WS_B
H1
IO
I2S_SCK_B
J1
I
Table 5.
Symbol
Description of functional pins
…continued
Pin
Type
[1]
Description
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| SAA7160ET/V2 | 制造商:NXP Semiconductors 功能描述:SAA7160ET/TFBGA88/TRAYDPM//V2 - Trays |
| SAA7160ET/V2,557 | 制造商:Sigma Designs 功能描述:PCI Express based audio and video bridge 88-Pin TFBGA |
| SAA7162E | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:PCI Express based dual channel multistandard audio and video decoder |
| SAA7164 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| SAA7165 | 制造商:NXP Semiconductors 功能描述: |
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